llvm-6502/test/MC/PowerPC
Ulrich Weigand 8950dd127a [PowerPC] Accept 17-bit signed immediates for addis
The assembler currently strictly verifies that immediates for
s16imm operands are in range (-32768 ... 32767).  This matches
the behaviour of the GNU assembler, with one exception: gas
allows, as a special case, operands in an extended range
(-65536 .. 65535) for the addis instruction only (and its
extended mnemonic lis).

The main reason for this seems to be to allow using unsigned
16-bit operands for lis, e.g. like lis %r1, 0xfedc.

Since this has been supported by gas for a long time, and
assembler source code seen "in the wild" actually exploits
this feature, this patch adds equivalent support to LLVM
for compatibility reasons.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:49:53 +00:00
..
lit.local.cfg
ppc64-encoding-bookII.s [PowerPC] Add some Book II instructions to AsmParser 2013-05-03 19:51:09 +00:00
ppc64-encoding-ext.s [PowerPC] Add extended rotate/shift mnemonics 2013-06-25 13:17:41 +00:00
ppc64-encoding-fp.s
ppc64-encoding-vmx.s
ppc64-encoding.s [PowerPC] Add rldcr/rldic instructions 2013-06-25 13:17:10 +00:00
ppc64-errors.s [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
ppc64-fixup-apply.s [PowerPC] Support @higher et.al. modifiers 2013-06-21 14:43:42 +00:00
ppc64-fixups.s [PowerPC] Support symbolic u16imm operands 2013-06-26 13:49:15 +00:00
ppc64-initial-cfa.s [MC/DWARF] Support .debug_frame / .debug_line code alignment factors 2013-06-12 14:46:54 +00:00
ppc64-operands.s [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
ppc64-relocs-01.s [PowerPC] Use assembler source in MC tests 2013-06-12 14:14:18 +00:00
ppc64-tls-relocs-01.s [PowerPC] Use assembler source in MC tests 2013-06-12 14:14:18 +00:00