llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-28 22:55:52 +00:00

History

Chris Lattner b716343851 I don't see why this optimization isn't safe, but it isn't, so disable it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25829 91177308-0d34-0410-b5e6-96231b3b80d8		2006-01-31 02:45:52 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp	If the target has V9 instructions, this pass is a noop, don't bother	2006-01-30 05:51:14 +00:00
Makefile	Add trivial subtarget support	2006-01-26 06:51:21 +00:00
README.txt	First step towards V9 instructions in the V8 backend, two conditional move	2006-01-30 05:35:57 +00:00
Sparc.h
Sparc.td	Subtarget feature can now set any variable to any value	2006-01-27 08:09:42 +00:00
SparcAsmPrinter.cpp
SparcInstrFormats.td
SparcInstrInfo.cpp
SparcInstrInfo.h
SparcInstrInfo.td	Revamp the ICC/FCC reading instructions to be parameterized in terms of the	2006-01-30 07:43:04 +00:00
SparcISelDAGToDAG.cpp	I don't see why this optimization isn't safe, but it isn't, so disable it	2006-01-31 02:45:52 +00:00
SparcRegisterInfo.cpp
SparcRegisterInfo.h
SparcRegisterInfo.td
SparcSubtarget.cpp	Two changes:	2006-01-30 04:57:43 +00:00
SparcSubtarget.h	Rest of subtarget support, remove references to ppc	2006-01-26 07:22:22 +00:00
SparcTargetMachine.cpp	Add trivial subtarget support	2006-01-26 06:51:21 +00:00
SparcTargetMachine.h	Add trivial subtarget support	2006-01-26 06:51:21 +00:00

README.txt

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].