llvm-6502/lib/Target/Alpha
2008-02-04 23:06:48 +00:00
..
Alpha.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
Alpha.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaAsmPrinter.cpp Get rid of the annoying blank lines before labels. 2008-02-02 08:39:46 +00:00
AlphaBranchSelector.cpp rename MachineInstr::setInstrDescriptor -> setDesc 2008-01-11 18:10:50 +00:00
AlphaCodeEmitter.cpp Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used 2008-01-03 02:56:28 +00:00
AlphaInstrFormats.td rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 2008-01-06 23:38:27 +00:00
AlphaInstrInfo.cpp remove MachineOpCode typedef. 2008-01-07 02:48:55 +00:00
AlphaInstrInfo.h Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaInstrInfo.td rename SDTRet -> SDTNone. 2008-01-15 22:02:54 +00:00
AlphaISelDAGToDAG.cpp Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 2008-02-04 23:06:48 +00:00
AlphaISelLowering.cpp Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. 2008-01-31 21:00:00 +00:00
AlphaISelLowering.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaJITInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaJITInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaLLRP.cpp Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 2007-12-30 20:49:49 +00:00
AlphaRegisterInfo.cpp Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaRegisterInfo.h Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaRegisterInfo.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaRelocations.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSchedule.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetMachine.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetMachine.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html