llvm-6502/lib/Target/CellSPU
Scott Michel f0569be4a9 - Remove Tilmann's custom truncate lowering: it completely hosed over
DAGcombine's ability to find reasons to remove truncates when they were not
  needed. Consequently, the CellSPU backend would produce correct, but _really
  slow and horrible_, code.

  Replaced with instruction sequences that do the equivalent truncation in
  SPUInstrInfo.td.

- Re-examine how unaligned loads and stores work. Generated unaligned
  load code has been tested on the CellSPU hardware; see the i32operations.c
  and i64operations.c in CodeGen/CellSPU/useful-harnesses.  (While they may be
  toy test code, it does prove that some real world code does compile
  correctly.)

- Fix truncating stores in bug 3193 (note: unpack_df.ll will still make llc
  fault because i64 ult is not yet implemented.)

- Added i64 eq and neq for setcc and select/setcc; started new instruction
  information file for them in SPU64InstrInfo.td. Additional i64 operations
  should be added to this file and not to SPUInstrInfo.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61447 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-27 04:51:36 +00:00
..
AsmPrinter - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
CellSDKIntrinsics.td
CMakeLists.txt CMake: Reflected changes on the CellSPU target build. May require a 2008-11-08 20:37:19 +00:00
Makefile CellSPU: Bring SPU's assembly printer more in-line with current LLVM code 2008-11-08 18:59:02 +00:00
README.txt CellSPU: 2008-11-24 17:11:17 +00:00
SPU64InstrInfo.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPU.h Use template to distinguish between function variants. 2008-10-08 07:44:52 +00:00
SPU.td Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 2008-11-24 07:34:46 +00:00
SPUCallingConv.td CellSPU: 2008-12-02 19:53:53 +00:00
SPUFrameInfo.cpp
SPUFrameInfo.h
SPUHazardRecognizers.cpp
SPUHazardRecognizers.h Experimental post-pass scheduling support. Post-pass scheduling 2008-11-19 23:18:57 +00:00
SPUInstrBuilder.h
SPUInstrFormats.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUInstrInfo.cpp - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUInstrInfo.h CellSPU: 2008-12-10 00:15:19 +00:00
SPUInstrInfo.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUISelDAGToDAG.cpp - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUISelLowering.cpp - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUISelLowering.h - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUMachineFunction.h
SPUNodes.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUOperands.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPURegisterInfo.cpp - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPURegisterInfo.h
SPURegisterInfo.td
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp
SPUSubtarget.h
SPUTargetAsmInfo.cpp - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPUTargetAsmInfo.h Teach CellSPU about ELF sections and new section emitter classes. 2008-11-07 04:36:25 +00:00
SPUTargetMachine.cpp CellSPU: 2008-12-10 00:15:19 +00:00
SPUTargetMachine.h CellSPU: 2008-12-10 00:15:19 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, RoadRunner SPU expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE. 

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

The unofficially official status page (because it's not easy to get an
officially blessed external web page from either IBM Austin or Aerosapce):

              http://sites.google.com/site/llvmcellspu/

TODO:
* Finish branch instructions, branch prediction

  These instructions were started, but only insofar as to get llvm-gcc-4.2's
  crtbegin.ll working (which doesn't.)

* Double floating point support

  This was started. "What's missing?" to be filled in.

* Intrinsics

  Lots of progress. "What's missing/incomplete?" to be filled in.

===-------------------------------------------------------------------------===