llvm-6502/test/MC/X86
Kevin Enderby b80d571ea8 Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23 18:18:17 +00:00
..
3DNow.s Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 2011-07-27 23:22:03 +00:00
2011-09-06-NoNewline.s Move test to the X86 directory, note the PR number and only run MC once. 2011-10-31 17:23:09 +00:00
intel-syntax-2.s Intel syntax. Support .intel_syntax directive. 2012-01-30 20:02:42 +00:00
intel-syntax-encoding.s Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,sd,ps,pd}, for intel syntax. 2012-01-30 22:47:12 +00:00
intel-syntax.s Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] 2012-01-27 19:48:28 +00:00
lit.local.cfg Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed. 2012-02-16 06:28:33 +00:00
padlock.s Recognize the xstorerng alias for VIA PadLock's xstore instruction. 2011-06-30 01:38:03 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s Make sure we correctly note the existence of an i8 immediate for vblendvps and friends, so we compute fixups correctly. PR11586. 2011-12-15 23:46:18 +00:00
x86_64-bmi-encoding.s Add X86 SARX, SHRX, and SHLX instructions. 2011-10-23 22:18:24 +00:00
x86_64-encoding.s Add encoding tests for flds/filds 2011-04-15 19:25:31 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s Support for encoding all FMA4 instructions and tablegen patterns for all 2011-11-30 22:09:42 +00:00
x86_64-imm-widths.s Replace a gross hack (the MOV64ri_alt instruction) with a slightly less 2010-10-05 21:09:45 +00:00
x86_64-xop-encoding.s XOP instructions and encoding tests. 2011-12-12 19:37:49 +00:00
x86_directives.s
x86_errors.s Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and 2011-10-27 17:40:41 +00:00
x86_operands.s
x86-32-avx.s Reorder declarations of vmovmskp* and also put the necessary AVX 2011-08-15 23:36:45 +00:00
x86-32-coverage.s Add vmfunc instruction to X86 assembler and disassembler. 2012-02-19 01:39:49 +00:00
x86-32-fma3.s
x86-32.s Updated the llvm-mc disassembler C API to support for the X86 target. 2012-02-23 18:18:17 +00:00
x86-64.s X86: alias cqo to cqto. 2011-11-24 12:02:46 +00:00