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b8145e3881
llvm-6502/lib/Target/Mips/AsmParser
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Jack Carter b8145e3881 Mips assembler: Explicit floating point condition register recognition. 
This patch allows the assembler to recognize $fcc0 
as a valid register for conditional move instructions. 

Corresponding test cases have been added.

Contributer: Vladimir Medic



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15 22:21:55 +00:00
..
CMakeLists.txt Add stub methods for mips assembly matcher. 2012-08-17 20:16:42 +00:00
LLVMBuild.txt
Makefile
MipsAsmParser.cpp Mips assembler: Explicit floating point condition register recognition. 2013-04-15 22:21:55 +00:00