Jack Carter b8145e3881 Mips assembler: Explicit floating point condition register recognition. ... This patch allows the assembler to recognize $fcc0 as a valid register for conditional move instructions. Corresponding test cases have been added. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179567 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-15 22:21:55 +00:00
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AArch64	AArch64: use full triple for ELF tests	2013-04-12 12:54:58 +00:00
ARM	ARM: Correct printing of pre-indexed operands.	2013-04-12 18:47:25 +00:00
AsmParser	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
COFF	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
Disassembler	Use object file specific section type for initial text section	2013-04-14 21:18:36 +00:00
ELF	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
MachO	Revert r15266. This fixes llvm.org/pr15266.	2013-02-14 16:23:08 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Mips assembler: Explicit floating point condition register recognition.	2013-04-15 22:21:55 +00:00
PowerPC	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
X86	Add CLAC/STAC instruction encoding/decoding support	2013-04-11 04:52:28 +00:00