Matt Arsenault dda22295e4 R600/SI: Try to fix BFE operands when moving to VALU ... This was broken by r208479 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208740 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-13 23:45:50 +00:00
..
AArch64	TableGen: use PrintMethods to print more aliases	2014-05-12 18:04:06 +00:00
ARM	ARMEB: Fix byte order of EH frame unwinding instructions, with modified test file	2014-05-13 16:44:30 +00:00
ARM64	Folding into CSEL when there is ZEXT between SETCC and ADD	2014-05-13 00:40:58 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Add global named register support	2014-05-11 19:29:11 +00:00
R600	R600/SI: Try to fix BFE operands when moving to VALU	2014-05-13 23:45:50 +00:00
SPARC	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
SystemZ
Thumb
Thumb2
X86	[CGP] r205941 changed the logic, so that a cast happens *before* 'Result' is	2014-05-13 15:42:45 +00:00
XCore