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b9e6b34e1e6141b4eeb2d2a7ca00652923575795
llvm-6502/test/CodeGen
T
History
Sean Callanan b9e6b34e1e Recommitting PALIGNR shift width fixes.
Thanks to Daniel Dunbar for fixing clang intrinsics:
  http://llvm.org/viewvc/llvm-project?view=rev&revision=89499


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
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Alpha
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ARM
Remat VLDRD from constpool. Clean up some instruction property specifications.
2009-11-20 19:57:15 +00:00
Blackfin
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CBackend
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CellSPU
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CPP
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Generic
Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048),
2009-11-20 10:45:10 +00:00
Mips
Unbreak test, Bruno please check.
2009-11-19 07:18:49 +00:00
MSP430
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PIC16
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PowerPC
Remove an incorrect overaggressive optimization
2009-11-20 22:16:40 +00:00
SPARC
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SystemZ
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Thumb
More consistent thumb1 asm printing.
2009-11-19 06:57:41 +00:00
Thumb2
Remat VLDRD from constpool. Clean up some instruction property specifications.
2009-11-20 19:57:15 +00:00
X86
Recommitting PALIGNR shift width fixes.
2009-11-20 22:28:42 +00:00
XCore
Add XCore support for indirectbr / blockaddress.
2009-11-18 23:20:42 +00:00
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