Hal Finkel ba51ae6864 [PowerPC] Support non-direct-sub/superclass VSX copies ... Our register allocation has become better recently, it seems, and is now starting to generate cross-block copies into inflated register classes. These copies are not transformed into subregister insertions/extractions by the PPCVSXCopy class, and so need to be handled directly by PPCInstrInfo::copyPhysReg. The code to do this was *almost* there, but not quite (it was unnecessarily restricting itself to only the direct sub/super-register-class case (not copying between, for example, something in VRRC and the lower-half of VSRC which are super-registers of F8RC). Triggering this behavior manually is difficult; I'm including two bugpoint-reduced test cases from the test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229457 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-16 23:46:30 +00:00
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Analysis
Assembler	ConstantFold: Properly fold GEP indices wider than i64	2015-02-16 19:10:02 +00:00
Bindings
Bitcode	[Bitcode reader] Fix a few assertions when reading invalid files	2015-02-16 00:03:11 +00:00
BugPoint
CodeGen	[PowerPC] Support non-direct-sub/superclass VSX copies	2015-02-16 23:46:30 +00:00
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MC	Fix quoting of #pragma comment for MS compat, LLVM part.	2015-02-16 11:57:17 +00:00
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tools	gold-plugin: fix test to allow default visibility on local symbols	2015-02-15 09:32:30 +00:00
Transforms	InstCombine: fold more cases of (fp_to_u/sint (u/sint_to_fp val))	2015-02-16 21:47:54 +00:00
Unit
Verifier	AsmParser: Reject alloca with function type	2015-02-16 08:38:03 +00:00
YAMLParser
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