llvm-6502/test/CodeGen
Hal Finkel ba51ae6864 [PowerPC] Support non-direct-sub/superclass VSX copies
Our register allocation has become better recently, it seems, and is now
starting to generate cross-block copies into inflated register classes. These
copies are not transformed into subregister insertions/extractions by the
PPCVSXCopy class, and so need to be handled directly by
PPCInstrInfo::copyPhysReg. The code to do this was *almost* there, but not
quite (it was unnecessarily restricting itself to only the direct
sub/super-register-class case (not copying between, for example, something in
VRRC and the lower-half of VSRC which are super-registers of F8RC).

Triggering this behavior manually is difficult; I'm including two
bugpoint-reduced test cases from the test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229457 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-16 23:46:30 +00:00
..
AArch64 AArch64: Safely handle the incoming sret call argument. 2015-02-16 18:10:47 +00:00
ARM [SimplifyCFG] Swap to using TargetTransformInfo for cost 2015-02-11 12:15:41 +00:00
BPF bpf: add missing lit.local.cfg 2015-01-24 18:20:52 +00:00
CPP
Generic overloaded-intrinsic-name: exercise anyptr on struct 2015-01-27 20:03:08 +00:00
Hexagon [Hexagon] Factoring classes out of store patterns. 2015-02-09 20:33:46 +00:00
Inputs IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00
Mips [mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC 2015-02-13 17:51:27 +00:00
MSP430
NVPTX [NVPTX] Emit .pragma "nounroll" for loops marked with nounroll 2015-02-01 02:27:45 +00:00
PowerPC [PowerPC] Support non-direct-sub/superclass VSX copies 2015-02-16 23:46:30 +00:00
R600 R600/SI: Implement correct f64 fdiv 2015-02-14 04:30:08 +00:00
SPARC SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here too 2015-02-16 21:47:58 +00:00
SystemZ Use the integrated assembler as default on SystemZ 2015-01-13 19:45:16 +00:00
Thumb IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00
Thumb2 Make buildbots better. 2015-02-11 12:24:09 +00:00
X86 [AVX512] Make 512b vector floating point rounds legal on AVX512. 2015-02-16 22:15:42 +00:00
XCore IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00