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https://github.com/c64scene-ar/llvm-6502.git
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61de70d98e
were using a class defined for 32 bit instructions and thus the instruction was for addiu instead of daddiu. This was corrected by adding the instruction opcode as a field in the base class to be filled in by the defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161359 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
465 B
LLVM
19 lines
465 B
LLVM
; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
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; RUN: | llvm-objdump -disassemble -triple mips64el - \
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; RUN: | FileCheck %s
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@p = external global i32*
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define void @f1() nounwind {
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entry:
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; CHECK: .text:
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; CHECK-NOT: addiu {{[0-9,a-f]+}}, {{[0-9,a-f]+}}, {{[0-9]+}}
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%a = alloca [10 x i32], align 4
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%arraydecay = getelementptr inbounds [10 x i32]* %a, i64 0, i64 0
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store i32* %arraydecay, i32** @p, align 8
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ret void
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; CHECK: jr $ra
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}
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