llvm-6502/lib/Target
2005-10-10 06:01:00 +00:00
..
Alpha This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out 2005-10-09 20:11:35 +00:00
CBackend fix CBackend/2005-09-27-VolatileFuncPtr.ll 2005-09-27 20:52:44 +00:00
IA64 Fix CodeGen/Generic/bool-to-double.ll 2005-10-07 04:50:48 +00:00
PowerPC These definitions have been moved to common code. 2005-10-10 06:01:00 +00:00
Skeleton CR registers are not used by this "target" 2005-09-30 06:43:58 +00:00
Sparc silence some warnings 2005-10-05 17:15:09 +00:00
SparcV8 silence some warnings 2005-10-05 17:15:09 +00:00
SparcV9 silence a warning 2005-10-02 16:27:59 +00:00
X86 silence some warnings 2005-10-02 16:29:36 +00:00
Makefile
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Print: 2005-09-07 05:44:14 +00:00
Target.td Pull DAG ISel generation nodes out of the PowerPC backend to where they 2005-10-10 06:00:30 +00:00
TargetData.cpp Update to use the new MathExtras.h support for log2 computation. 2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSelectionDAG.td Pull DAG ISel generation nodes out of the PowerPC backend to where they 2005-10-10 06:00:30 +00:00
TargetSubtarget.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00