mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 00:32:23 +00:00
ba51ae6864
Our register allocation has become better recently, it seems, and is now starting to generate cross-block copies into inflated register classes. These copies are not transformed into subregister insertions/extractions by the PPCVSXCopy class, and so need to be handled directly by PPCInstrInfo::copyPhysReg. The code to do this was *almost* there, but not quite (it was unnecessarily restricting itself to only the direct sub/super-register-class case (not copying between, for example, something in VRRC and the lower-half of VSRC which are super-registers of F8RC). Triggering this behavior manually is difficult; I'm including two bugpoint-reduced test cases from the test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229457 91177308-0d34-0410-b5e6-96231b3b80d8
134 lines
5.8 KiB
LLVM
134 lines
5.8 KiB
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@ub = external global [1024 x i32], align 4
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@uc = external global [1024 x i32], align 4
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; Function Attrs: noinline nounwind
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define void @_Z8example9Pj() #0 {
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entry:
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br label %vector.body
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; CHECK-LABEL: @_Z8example9Pj
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; CHECK: xxlor
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vector.body: ; preds = %vector.body, %entry
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%index = phi i64 [ 0, %entry ], [ %index.next, %vector.body ]
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%vec.phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %43, %vector.body ]
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%vec.phi20 = phi <4 x i32> [ zeroinitializer, %entry ], [ %44, %vector.body ]
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%vec.phi21 = phi <4 x i32> [ zeroinitializer, %entry ], [ %45, %vector.body ]
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%vec.phi23 = phi <4 x i32> [ zeroinitializer, %entry ], [ %46, %vector.body ]
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%vec.phi24 = phi <4 x i32> [ zeroinitializer, %entry ], [ %47, %vector.body ]
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%vec.phi25 = phi <4 x i32> [ zeroinitializer, %entry ], [ %48, %vector.body ]
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%vec.phi26 = phi <4 x i32> [ zeroinitializer, %entry ], [ %49, %vector.body ]
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%vec.phi27 = phi <4 x i32> [ zeroinitializer, %entry ], [ %50, %vector.body ]
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%vec.phi28 = phi <4 x i32> [ zeroinitializer, %entry ], [ %51, %vector.body ]
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%vec.phi29 = phi <4 x i32> [ zeroinitializer, %entry ], [ %52, %vector.body ]
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%vec.phi30 = phi <4 x i32> [ zeroinitializer, %entry ], [ %53, %vector.body ]
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%wide.load32 = load <4 x i32>* null, align 4
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%.sum82 = add i64 %index, 24
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%0 = getelementptr [1024 x i32]* @ub, i64 0, i64 %.sum82
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load36 = load <4 x i32>* %1, align 4
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%wide.load37 = load <4 x i32>* undef, align 4
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%.sum84 = add i64 %index, 32
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%2 = getelementptr [1024 x i32]* @ub, i64 0, i64 %.sum84
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%3 = bitcast i32* %2 to <4 x i32>*
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%wide.load38 = load <4 x i32>* %3, align 4
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%.sum85 = add i64 %index, 36
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%4 = getelementptr [1024 x i32]* @ub, i64 0, i64 %.sum85
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%5 = bitcast i32* %4 to <4 x i32>*
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%wide.load39 = load <4 x i32>* %5, align 4
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%6 = getelementptr [1024 x i32]* @ub, i64 0, i64 undef
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%7 = bitcast i32* %6 to <4 x i32>*
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%wide.load40 = load <4 x i32>* %7, align 4
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%.sum87 = add i64 %index, 44
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%8 = getelementptr [1024 x i32]* @ub, i64 0, i64 %.sum87
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%9 = bitcast i32* %8 to <4 x i32>*
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%wide.load41 = load <4 x i32>* %9, align 4
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%10 = getelementptr inbounds [1024 x i32]* @uc, i64 0, i64 %index
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%11 = bitcast i32* %10 to <4 x i32>*
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%wide.load42 = load <4 x i32>* %11, align 4
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%.sum8889 = or i64 %index, 4
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%12 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum8889
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%13 = bitcast i32* %12 to <4 x i32>*
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%wide.load43 = load <4 x i32>* %13, align 4
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%.sum9091 = or i64 %index, 8
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%14 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum9091
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%15 = bitcast i32* %14 to <4 x i32>*
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%wide.load44 = load <4 x i32>* %15, align 4
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%.sum94 = add i64 %index, 16
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%16 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum94
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%17 = bitcast i32* %16 to <4 x i32>*
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%wide.load46 = load <4 x i32>* %17, align 4
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%.sum95 = add i64 %index, 20
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%18 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum95
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%19 = bitcast i32* %18 to <4 x i32>*
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%wide.load47 = load <4 x i32>* %19, align 4
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%20 = getelementptr [1024 x i32]* @uc, i64 0, i64 undef
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%21 = bitcast i32* %20 to <4 x i32>*
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%wide.load48 = load <4 x i32>* %21, align 4
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%.sum97 = add i64 %index, 28
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%22 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum97
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%23 = bitcast i32* %22 to <4 x i32>*
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%wide.load49 = load <4 x i32>* %23, align 4
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%.sum98 = add i64 %index, 32
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%24 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum98
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%25 = bitcast i32* %24 to <4 x i32>*
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%wide.load50 = load <4 x i32>* %25, align 4
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%.sum99 = add i64 %index, 36
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%26 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum99
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%27 = bitcast i32* %26 to <4 x i32>*
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%wide.load51 = load <4 x i32>* %27, align 4
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%.sum100 = add i64 %index, 40
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%28 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum100
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%29 = bitcast i32* %28 to <4 x i32>*
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%wide.load52 = load <4 x i32>* %29, align 4
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%.sum101 = add i64 %index, 44
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%30 = getelementptr [1024 x i32]* @uc, i64 0, i64 %.sum101
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%31 = bitcast i32* %30 to <4 x i32>*
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%wide.load53 = load <4 x i32>* %31, align 4
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%32 = add <4 x i32> zeroinitializer, %vec.phi
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%33 = add <4 x i32> zeroinitializer, %vec.phi20
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%34 = add <4 x i32> %wide.load32, %vec.phi21
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%35 = add <4 x i32> zeroinitializer, %vec.phi23
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%36 = add <4 x i32> zeroinitializer, %vec.phi24
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%37 = add <4 x i32> %wide.load36, %vec.phi25
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%38 = add <4 x i32> %wide.load37, %vec.phi26
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%39 = add <4 x i32> %wide.load38, %vec.phi27
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%40 = add <4 x i32> %wide.load39, %vec.phi28
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%41 = add <4 x i32> %wide.load40, %vec.phi29
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%42 = add <4 x i32> %wide.load41, %vec.phi30
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%43 = sub <4 x i32> %32, %wide.load42
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%44 = sub <4 x i32> %33, %wide.load43
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%45 = sub <4 x i32> %34, %wide.load44
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%46 = sub <4 x i32> %35, %wide.load46
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%47 = sub <4 x i32> %36, %wide.load47
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%48 = sub <4 x i32> %37, %wide.load48
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%49 = sub <4 x i32> %38, %wide.load49
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%50 = sub <4 x i32> %39, %wide.load50
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%51 = sub <4 x i32> %40, %wide.load51
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%52 = sub <4 x i32> %41, %wide.load52
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%53 = sub <4 x i32> %42, %wide.load53
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%index.next = add i64 %index, 48
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br i1 false, label %middle.block, label %vector.body
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middle.block: ; preds = %vector.body
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%.lcssa112 = phi <4 x i32> [ %53, %vector.body ]
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%.lcssa111 = phi <4 x i32> [ %52, %vector.body ]
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%.lcssa110 = phi <4 x i32> [ %51, %vector.body ]
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%.lcssa109 = phi <4 x i32> [ %50, %vector.body ]
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%.lcssa108 = phi <4 x i32> [ %49, %vector.body ]
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%.lcssa107 = phi <4 x i32> [ %48, %vector.body ]
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%.lcssa106 = phi <4 x i32> [ %47, %vector.body ]
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%.lcssa105 = phi <4 x i32> [ %46, %vector.body ]
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%.lcssa103 = phi <4 x i32> [ %45, %vector.body ]
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%.lcssa102 = phi <4 x i32> [ %44, %vector.body ]
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%.lcssa = phi <4 x i32> [ %43, %vector.body ]
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ret void
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}
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attributes #0 = { noinline nounwind }
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