Matheus Almeida bc7114feab [mips] Small code generation improvement for conditional operator (select) ... in case the operands are constants and its difference is |1|. It should be possible in those cases to rematerialize the result using MIPS's slt and similar instructions. The small update to some of the tests in cmov.ll, sel1c.ll and sel2c.ll was needed otherwise the optimization implemented in this patch would have been triggered (difference between the operands was 1) and that would have changed the semantic of the tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196498 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-05 12:07:05 +00:00
..
AsmParser	[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.	2013-11-28 17:04:04 +00:00
Disassembler	[mips][msa] Fix issue with immediate fields of LD/ST instructions	2013-12-05 11:06:22 +00:00
InstPrinter	[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.	2013-11-28 17:04:04 +00:00
MCTargetDesc	[mips][msa] Fix issue with immediate fields of LD/ST instructions	2013-12-05 11:06:22 +00:00
TargetInfo	[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.	2013-11-28 17:04:04 +00:00
CMakeLists.txt	[CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.	2013-11-28 17:04:31 +00:00
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td	Use instr mapping for microMIPS in llvm-mc.	2013-11-15 08:07:34 +00:00
MicroMipsInstrInfo.td	[mips] Redefine TAILCALL as a pseudo instruction.	2013-11-27 23:58:32 +00:00
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp	Make sure that for C++ emitting LwConstant32 pseudos, that it corresponds	2013-11-24 06:18:50 +00:00
Mips16InstrInfo.h	Allow the code which returns the length for inline assembler to know	2013-11-13 04:37:52 +00:00
Mips16InstrInfo.td	Correct word hyphenations	2013-12-05 05:44:44 +00:00
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp	Make all the conditional Mips 16 branches get initially set for the	2013-11-15 02:21:52 +00:00
Mips16ISelLowering.h
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips64InstrInfo.td	[mips] Redefine TAILCALL as a pseudo instruction.	2013-11-27 23:58:32 +00:00
Mips.h	[mips] Revert test commit r195922.	2013-11-28 15:26:33 +00:00
Mips.td	Change the default of AsmWriterClassName and isMCAsmWriter.	2013-12-02 04:55:42 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	Remove dead code.	2013-12-02 15:36:37 +00:00
MipsAsmPrinter.h	Fix a bug related to constant islands for Mips16 and mips16/32 dual mode.	2013-11-26 20:38:40 +00:00
MipsCallingConv.td
MipsCodeEmitter.cpp	[mips][msa] Fix issue with immediate fields of LD/ST instructions	2013-12-05 11:06:22 +00:00
MipsCondMov.td
MipsConstantIslandPass.cpp	Correct word hyphenations	2013-12-05 05:44:44 +00:00
MipsDelaySlotFiller.cpp
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	Support for microMIPS trap instruction with immediate operands.	2013-11-13 13:15:03 +00:00
MipsInstrFPU.td
MipsInstrInfo.cpp	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
MipsInstrInfo.h	[weak vtables] Remove a bunch of weak vtables	2013-11-19 00:57:56 +00:00
MipsInstrInfo.td	[mips][msa] Fix issue with immediate fields of LD/ST instructions	2013-12-05 11:06:22 +00:00
MipsISelDAGToDAG.cpp	[mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. not intrinsics)	2013-11-12 10:45:18 +00:00
MipsISelDAGToDAG.h	[mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. not intrinsics)	2013-11-12 10:45:18 +00:00
MipsISelLowering.cpp	[mips] Small code generation improvement for conditional operator (select)	2013-12-05 12:07:05 +00:00
MipsISelLowering.h
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp	Fixed issue with microMIPS long branch.	2013-11-30 19:12:28 +00:00
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsMSAInstrFormats.td	[mips][msa] Pseudo instructions require HasMSA too. Inherit from MSAPseudo instead of MipsPseudo	2013-11-20 14:32:28 +00:00
MipsMSAInstrInfo.td	[mips][msa] Fix issue with immediate fields of LD/ST instructions	2013-12-05 11:06:22 +00:00
MipsOptimizePICCall.cpp	[mips] Implement the following optimizations using dominance information to	2013-11-27 23:38:42 +00:00
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td
MipsRelocations.h
MipsSchedule.td
MipsSEFrameLowering.cpp
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0)	2013-11-18 13:12:43 +00:00
MipsSEInstrInfo.h
MipsSEISelDAGToDAG.cpp	[mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0)	2013-11-18 13:12:43 +00:00
MipsSEISelDAGToDAG.h	[mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. not intrinsics)	2013-11-12 10:45:18 +00:00
MipsSEISelLowering.cpp	[mips] Implement the following optimizations using dominance information to	2013-11-27 23:38:42 +00:00
MipsSEISelLowering.h
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp	[mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.	2013-11-30 13:47:57 +00:00
MipsSERegisterInfo.h
MipsSubtarget.cpp	Check in conditional branches for constant islands. Still need to finish	2013-11-28 00:56:37 +00:00
MipsSubtarget.h	[mips] Partially revert r193641. Stack alignment should not be determined by	2013-11-11 21:49:03 +00:00
MipsTargetMachine.cpp	[mips] Implement the following optimizations using dominance information to	2013-11-27 23:38:42 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h	reverts 195057 per request	2013-11-19 20:53:28 +00:00
MSA.txt	[mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. not intrinsics)	2013-11-12 10:45:18 +00:00