llvm-6502/test/MC
Ulrich Weigand e5a30f0ca2 [PowerPC] Support generic conditional branches in asm parser
This adds instruction patterns to cover the generic forms of
the conditional branch instructions.  This allows the assembler
to support the generic mnemonics.

The compiler will still generate the various specific forms
of the instruction that were already supported.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184722 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 11:55:21 +00:00
..
AArch64 AArch64: fix overzealous NEXTing for Windows testing. 2013-06-23 15:32:01 +00:00
ARM ARM: fix thumb1 nop decoding 2013-06-24 09:11:53 +00:00
AsmParser
COFF
Disassembler ARM: check predicate bits for thumb instructions 2013-06-24 09:15:01 +00:00
ELF [MC/DWARF] Generate multiple .debug_line entries for adjacent .loc directives 2013-06-19 21:27:27 +00:00
MachO
Markup
MBlaze
Mips Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers. 2013-06-20 11:21:49 +00:00
PowerPC [PowerPC] Support generic conditional branches in asm parser 2013-06-24 11:55:21 +00:00
SystemZ
X86