llvm-6502/test/CodeGen
Daniel Sanders bda72d8098 [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.
Summary:
Following on from r209907 which made personality encodings indirect, do the
same for TType encodings. This fixes the case where a try/catch block needs
to generate references to, for example, std::exception in the
.gcc_except_table.

This commit uses DW_EH_PE_sdata8 for N64 as far as is possible at the moment.
However, it is possible to end up with DW_EH_PE_sdata4 when a TargetMachine is
not available. There's no risk of issues with inconsistency here since the
tables are self describing but it does mean there is a small chance of the
PC-relative offset being out of range for particularly large programs.

Reviewers: petarj

Reviewed By: petarj

Subscribers: srhines, joerg, tberghammer, llvm-commits

Differential Revision: http://reviews.llvm.org/D9669


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238190 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 10:19:18 +00:00
..
AArch64 [AArch64][CGP] Sink zext feeding stxr/stlxr into the same block. 2015-05-22 21:37:17 +00:00
ARM Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions. 2015-05-23 01:14:08 +00:00
BPF [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Revert r237954, "Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format)." 2015-05-22 07:17:07 +00:00
Hexagon [Hexagon] Generate hardware loop for a vectorized loop 2015-05-14 20:36:19 +00:00
Inputs IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Mips [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only. 2015-05-26 10:19:18 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
NVPTX [NVPTX] Handle addrspacecast constant expressions in aggregate initializers 2015-04-28 17:18:30 +00:00
PowerPC This patch adds support for the vector quadword add/sub instructions introduced 2015-05-25 15:49:26 +00:00
R600 R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips 2015-05-25 16:15:54 +00:00
SPARC Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Thumb2 Revert r237590, "ARM: allow jump tables to be placed as constant islands." 2015-05-21 23:20:55 +00:00
WinEH [WinEH] C++ EH state numbering fixes 2015-05-20 23:22:24 +00:00
X86 [X86][AVX2] Vectorized i16 shift operators 2015-05-25 17:49:13 +00:00
XCore IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00