llvm-6502/test/CodeGen/SPARC
James Y Knight f272788a95 Add support for the Sparc implementation-defined "ASR" registers.
(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:29:48 +00:00
..
64abi.ll
64bit.ll
64cond.ll
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll
2011-01-11-CC.ll
2011-01-11-FrameAddr.ll
2011-01-19-DelaySlot.ll
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll
atomics.ll
basictest.ll Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
blockaddr.ll
constpool.ll
ctpop.ll
DbgValueOtherTargets.test
empty-functions.ll
exception.ll
float.ll
fp128.ll
globals.ll
inlineasm.ll
leafproc.ll
lit.local.cfg
mature-mc-support.ll
missinglabel.ll
mult-alt-generic-sparc.ll
obj-relocs.ll
parts.ll
private.ll
rem.ll
setjmp.ll
spillsize.ll
sret-secondary.ll
tls.ll
trap.ll
varargs.ll