Sebastian Pop becdf4d7cd add TableGen support to create relationship maps between instructions ... Relationship maps are represented as InstrMapping records which are parsed by TableGen and the information is used to construct mapping tables to represent appropriate relations between instructions. These tables are emitted into XXXGenInstrInfo.inc file along with the functions to query them. Patch by Jyotsna Verma <jverma@codeaurora.org>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166685 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-25 15:54:06 +00:00
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Mangler.h	whitespace	2012-10-09 01:56:07 +00:00
Target.td	add TableGen support to create relationship maps between instructions	2012-10-25 15:54:06 +00:00
TargetCallingConv.h	Issue description:	2012-10-10 11:37:36 +00:00
TargetCallingConv.td	Add TableGen support for callee saved registers.	2012-01-17 22:46:58 +00:00
TargetELFWriterInfo.h	[Hexagon] Clean up Hexagon ELF definition.	2012-05-17 16:46:46 +00:00
TargetFrameLowering.h	Prune some includes and forward declarations.	2012-03-25 18:09:44 +00:00
TargetInstrInfo.h	misched: Use the TargetSchedModel interface wherever possible.	2012-10-10 05:43:09 +00:00
TargetIntrinsicInfo.h	Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.	2012-09-17 06:59:23 +00:00
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetJITInfo.h	Prune some includes and forward declarations.	2012-03-25 18:09:44 +00:00
TargetLibraryInfo.h	Make MemoryBuiltins aware of TargetLibraryInfo.	2012-08-29 15:32:21 +00:00
TargetLowering.h	Implement a basic cost model for vector and scalar instructions.	2012-10-24 23:47:38 +00:00
TargetLoweringObjectFile.h	Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.	2012-09-17 06:59:23 +00:00
TargetMachine.h	Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.	2012-10-18 23:22:48 +00:00
TargetOpcodes.h	Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be	2012-09-06 09:17:37 +00:00
TargetOptions.h	Add support for the --param ssp-buffer-size= driver option.	2012-08-21 16:15:24 +00:00
TargetRegisterInfo.h	Add TRI::getSubRegIndexLaneMask().	2012-09-11 16:34:08 +00:00
TargetSchedule.td	Added instregex support to TableGen subtarget emitter.	2012-10-03 23:06:32 +00:00
TargetSelectionDAG.td	Remove extra MayLoad/MayStore flags from atomic_load/store.	2012-08-28 03:11:32 +00:00
TargetSelectionDAGInfo.h	Move TargetData to DataLayout.	2012-10-08 16:38:25 +00:00
TargetSubtargetInfo.h	misched: remove the unused getSpecialAddressLatency hook.	2012-10-08 18:54:00 +00:00
TargetTransformImpl.h	Implement a basic cost model for vector and scalar instructions.	2012-10-24 23:47:38 +00:00