Jim Grosbach bf3c322640 ARM fix encoding fixup resolution for ldrd and friends. ... The 8-bit payload is not contiguous in the opcode. Move the upper nibble over 4 bits into the correct place. rdar://11158641 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153780 91177308-0d34-0410-b5e6-96231b3b80d8		2012-03-30 21:54:22 +00:00
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Analysis	Add computeMaskedBitsLoad back, as it was the change to instsimplify that	2012-03-30 15:52:11 +00:00
Archive	Include cstdio in a few place that depended on getting it transitively through StringExtras.h	2012-03-23 11:35:30 +00:00
AsmParser	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Bitcode	llvm::SwitchInst	2012-03-11 06:09:17 +00:00
CodeGen	If we have a VLA that has a "use" in a metadata node that's then used	2012-03-30 00:02:55 +00:00
DebugInfo
ExecutionEngine	Re-factored RuntimeDyLd:	2012-03-30 16:45:19 +00:00
Linker	It's possible for two types, which are isomorphic, to be added to the	2012-03-23 23:17:38 +00:00
MC	Prune some includes	2012-03-27 07:54:11 +00:00
Object	[Object/COFF]: Expose getSectionContents.	2012-03-19 20:27:37 +00:00
Support	Lowercase the tag name to match the rest of dwarf.	2012-03-29 21:35:05 +00:00
TableGen	Fix infinite loop in nested multiclasses.	2012-03-07 16:39:35 +00:00
Target	ARM fix encoding fixup resolution for ldrd and friends.	2012-03-30 21:54:22 +00:00
Transforms	Don't PRE compares.	2012-03-29 17:22:39 +00:00
VMCore	Handle unreachable code in the dominates functions. This changes users when	2012-03-30 16:46:21 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile