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AArch64
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Lower multiply-negate operation to mneg on AArch64
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2014-12-22 13:38:58 +00:00 |
ARM
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[ARM] Don't break alignment when combining base updates into load/stores.
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2014-12-23 06:07:31 +00:00 |
CPP
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Generic
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CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.
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2014-12-19 20:50:07 +00:00 |
Hexagon
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[Hexagon] Adding reg-reg indexed load forms.
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2014-12-30 18:58:47 +00:00 |
Inputs
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |
Mips
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[mips][microMIPS] Fix bugs related to atomic SC/LL instructions
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2014-12-18 16:39:29 +00:00 |
MSP430
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NVPTX
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[NVPTX] Fix bugs related to isSingleValueType
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2014-12-17 17:59:04 +00:00 |
PowerPC
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PowerPC: CTR shouldn't fire if a TLS call is in the loop
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2014-12-27 19:45:38 +00:00 |
R600
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Enable (sext x) == C --> x == (trunc C) combine
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2014-12-21 16:48:42 +00:00 |
SPARC
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |
SystemZ
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |
Thumb
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |
Thumb2
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |
X86
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Revert "merge consecutive stores of extracted vector elements"
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2014-12-31 00:40:28 +00:00 |
XCore
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IR: Make metadata typeless in assembly
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2014-12-15 19:07:53 +00:00 |