llvm-6502/test/CodeGen
Akira Hatanaka b3cb36026a [x86] Fix printing of register operands with q modifier.
Emit 32-bit register names instead of 64-bit register names if the target does
not have 64-bit general purpose registers.

<rdar://problem/14653996>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205067 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-28 23:28:07 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: add intrinsics for the v8 ldaex/stlex 2014-03-26 14:39:31 +00:00
CPP
Generic
Hexagon
Inputs
Mips Add @llvm.clear_cache builtin 2014-03-26 12:52:28 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Fix VSX permutation isel 2014-03-28 20:24:55 +00:00
R600 R600: Implement isZExtFree. 2014-03-27 17:23:31 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [x86] Fix printing of register operands with q modifier. 2014-03-28 23:28:07 +00:00
XCore