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intrinsics
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[Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing intrinsic parameters to appropriate width.
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2015-06-12 19:57:32 +00:00 |
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vect
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absaddr-store.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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absimm.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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adde.ll
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addh-sext-trunc.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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addh-shifted.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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addh.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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addrmode-indoff.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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alu64.ll
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always-ext.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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args.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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ashift-left-right.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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barrier-flag.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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base-offset-addr.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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base-offset-post.ll
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[Hexagon] Adding some codegen tests and updating some to match spec.
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2015-06-13 21:46:39 +00:00 |
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block-addr.ll
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BranchPredict.ll
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brev_ld.ll
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brev_st.ll
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calling-conv-2.ll
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[PATCH] [HEXAGON] Add a test program to verify calling convention
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2015-05-12 20:13:10 +00:00 |
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cext-check.ll
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cext-valid-packet1.ll
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[Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.
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2015-05-29 14:44:13 +00:00 |
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cext-valid-packet2.ll
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[Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.
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2015-05-29 14:44:13 +00:00 |
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circ_ld.ll
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circ_ldd_bug.ll
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circ_ldw.ll
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circ_st.ll
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clr_set_toggle.ll
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cmp_pred2.ll
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cmp_pred_reg.ll
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cmp_pred.ll
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cmp-to-genreg.ll
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cmp-to-predreg.ll
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cmpb_pred.ll
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combine_ir.ll
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combine.ll
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compound.ll
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[Hexagon] Adding functionality for searching for compound instruction pairs. Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.
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2015-06-08 16:34:47 +00:00 |
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convertdptoint.ll
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convertdptoll.ll
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convertsptoint.ll
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convertsptoll.ll
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ctlz-cttz-ctpop.ll
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ctor.ll
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dadd.ll
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dmul.ll
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double.ll
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doubleconvert-ieee-rnd-near.ll
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dsub.ll
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dualstore.ll
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[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
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2015-06-05 16:00:11 +00:00 |
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duplex.ll
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[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
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2015-06-05 16:00:11 +00:00 |
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expand-condsets-basic.ll
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expand-condsets-rm-segment.ll
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expand-condsets-undef.ll
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extload-combine.ll
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fadd.ll
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fcmp.ll
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float.ll
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floatconvert-ieee-rnd-near.ll
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fmul.ll
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frame.ll
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fsub.ll
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fusedandshift.ll
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gp-plus-offset-load.ll
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gp-plus-offset-store.ll
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gp-rel.ll
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hwloop1.ll
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hwloop2.ll
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hwloop3.ll
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hwloop4.ll
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hwloop5.ll
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[Hexagon] Generate hardware loop for a vectorized loop
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2015-05-14 20:36:19 +00:00 |
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hwloop-cleanup.ll
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hwloop-const.ll
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hwloop-crit-edge.ll
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[Hexagon] Generate hardware loop when loop has a critical edge
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2015-05-13 14:54:24 +00:00 |
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hwloop-dbg.ll
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hwloop-le.ll
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hwloop-loop1.ll
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[Hexagon] Generate loop1 instruction for nested loops
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2015-05-13 17:56:03 +00:00 |
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hwloop-lt1.ll
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hwloop-lt.ll
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hwloop-missed.ll
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hwloop-ne.ll
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hwloop-ph-deadcode.ll
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[Hexagon] Remove dead constant assignment in hardware loop pass
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2015-05-14 17:31:40 +00:00 |
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hwloop-pos-ivbump1.ll
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[Hexagon] Check for underflow/wrap in hardware loop pass
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2015-05-14 14:15:08 +00:00 |
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hwloop-preheader.ll
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hwloop-range.ll
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hwloop-recursion.ll
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[Hexagon] Check for underflow/wrap in hardware loop pass
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2015-05-14 14:15:08 +00:00 |
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hwloop-wrap2.ll
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[Hexagon] Check for underflow/wrap in hardware loop pass
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2015-05-14 14:15:08 +00:00 |
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hwloop-wrap.ll
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[Hexagon] Check for underflow/wrap in hardware loop pass
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2015-05-14 14:15:08 +00:00 |
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i1_VarArg.ll
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i8_VarArg.ll
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i16_VarArg.ll
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idxload-with-zero-offset.ll
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indirect-br.ll
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lit.local.cfg
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macint.ll
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mem-fi-add.ll
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memops1.ll
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memops2.ll
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memops3.ll
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memops.ll
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misaligned-access.ll
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mpy.ll
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newvaluejump2.ll
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newvaluejump.ll
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newvaluestore.ll
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opt-fabs.ll
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opt-fneg.ll
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packetize_cond_inst.ll
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postinc-load.ll
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postinc-store.ll
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pred-absolute-store.ll
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pred-gp.ll
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pred-instrs.ll
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predicate-copy.ll
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relax.ll
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[Hexagon] Reapply 238772 OSABI was not correctly set, added empty_elf test to make sure it is.
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2015-06-03 17:34:16 +00:00 |
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remove_lsr.ll
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remove-endloop.ll
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shrink-frame-basic.ll
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signed_immediates.ll
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[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
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2015-06-10 16:52:32 +00:00 |
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simple_addend.ll
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[Hexagon] PC-relative offsets are relative to packet start rather than the offset of the relocation. Set relocation addend and check it's correct in the ELF.
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2015-06-15 21:52:13 +00:00 |
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simpletailcall.ll
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split-const32-const64.ll
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stack-align1.ll
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stack-align2.ll
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stack-alloca1.ll
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stack-alloca2.ll
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static.ll
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struct_args_large.ll
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struct_args.ll
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sube.ll
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[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
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2015-06-05 16:00:11 +00:00 |
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tail-call-mem-intrinsics.ll
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tail-call-trunc.ll
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tfr-to-combine.ll
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union-1.ll
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vaddh.ll
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validate-offset.ll
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zextloadi1.ll
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