mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
2.3 KiB
LLVM
60 lines
2.3 KiB
LLVM
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: {{^}}cube:
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; CHECK: CUBE T{{[0-9]}}.X
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; CHECK: CUBE T{{[0-9]}}.Y
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; CHECK: CUBE T{{[0-9]}}.Z
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; CHECK: CUBE * T{{[0-9]}}.W
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define void @cube() #0 {
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main_body:
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%0 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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%1 = extractelement <4 x float> %0, i32 3
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%2 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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%3 = extractelement <4 x float> %2, i32 0
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%4 = fdiv float %3, %1
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%5 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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%6 = extractelement <4 x float> %5, i32 1
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%7 = fdiv float %6, %1
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%8 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9)
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%9 = extractelement <4 x float> %8, i32 2
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%10 = fdiv float %9, %1
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%11 = insertelement <4 x float> undef, float %4, i32 0
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%12 = insertelement <4 x float> %11, float %7, i32 1
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%13 = insertelement <4 x float> %12, float %10, i32 2
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%14 = insertelement <4 x float> %13, float 1.000000e+00, i32 3
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%15 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %14)
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%16 = extractelement <4 x float> %15, i32 0
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%17 = extractelement <4 x float> %15, i32 1
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%18 = extractelement <4 x float> %15, i32 2
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%19 = extractelement <4 x float> %15, i32 3
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%20 = call float @fabs(float %18)
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%21 = fdiv float 1.000000e+00, %20
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%22 = fmul float %16, %21
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%23 = fadd float %22, 1.500000e+00
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%24 = fmul float %17, %21
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%25 = fadd float %24, 1.500000e+00
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%26 = insertelement <4 x float> undef, float %25, i32 0
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%27 = insertelement <4 x float> %26, float %23, i32 1
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%28 = insertelement <4 x float> %27, float %19, i32 2
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%29 = insertelement <4 x float> %28, float %25, i32 3
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%30 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %29, i32 16, i32 0, i32 4)
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call void @llvm.R600.store.swizzle(<4 x float> %30, i32 0, i32 0)
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ret void
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}
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; Function Attrs: readnone
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declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #1
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; Function Attrs: readnone
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declare float @fabs(float) #1
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; Function Attrs: readnone
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declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #0 = { "ShaderType"="0" }
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attributes #1 = { readnone }
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