llvm-6502/test/CodeGen
2014-09-03 15:22:41 +00:00
..
AArch64 Reapply r216805 "[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR."" 2014-09-03 07:07:10 +00:00
ARM Missing test from r216989 2014-09-02 22:46:18 +00:00
CPP
Generic
Hexagon
Inputs
Mips Replace -use-init-array with -use-ctors. 2014-09-02 13:54:53 +00:00
MSP430 Do not assume the value passed to memset is an i32. 2014-08-29 08:23:53 +00:00
NVPTX [MachineSink] Use the real post dominator tree 2014-09-01 03:47:25 +00:00
PowerPC Enable splitting indexing from loads with TargetConstants 2014-09-02 16:05:23 +00:00
R600 R600/SI: Add a pattern for i64 and in a branch 2014-09-03 15:22:41 +00:00
SPARC
SystemZ
Thumb Check-label a bit more specific 2014-09-03 13:32:08 +00:00
Thumb2
X86 Fix PR20800: correctly calculate the offset of the subq instruction when generating compact unwind info. 2014-09-03 07:11:34 +00:00
XCore