llvm-6502

CallingConvLower.cpp

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CMakeLists.txt

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DAGCombiner.cpp

fix PR6533 by updating the br(xor) code to remember the case

2010-03-10 23:46:44 +00:00

FastISel.cpp

Remove dead include.

2010-03-11 02:28:48 +00:00

FunctionLoweringInfo.cpp

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FunctionLoweringInfo.h

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InstrEmitter.cpp

Make the NDEBUG assertion stronger and more clear what is

2010-03-25 05:40:48 +00:00

InstrEmitter.h

reapply 99444/99445, which I speculatively reverted in

2010-03-25 04:41:16 +00:00

LegalizeDAG.cpp

Get rid of target-specific nodes for fp16 <-> fp32 conversion.

2010-03-18 22:35:37 +00:00

LegalizeFloatTypes.cpp

Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes

2010-03-14 21:08:40 +00:00

LegalizeIntegerTypes.cpp

Revert 99335. getTypeToExpandTo's iterative behavior is actually

2010-03-23 22:44:42 +00:00

LegalizeTypes.cpp

Remove dead parameter passing.

2010-03-02 01:55:18 +00:00

LegalizeTypes.h

Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes

2010-03-14 21:08:40 +00:00

LegalizeTypesGeneric.cpp

Add non-temporal flags and remove an assumption of default arguments.

2010-02-15 17:00:31 +00:00

LegalizeVectorOps.cpp

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LegalizeVectorTypes.cpp

Fixed a widening bug where we were not using the correct size for the load

2010-03-19 01:19:52 +00:00

Makefile

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ScheduleDAGFast.cpp

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ScheduleDAGList.cpp

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ScheduleDAGRRList.cpp

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ScheduleDAGSDNodes.cpp

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

2010-03-25 01:38:16 +00:00

ScheduleDAGSDNodes.h

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SDNodeDbgValue.h

Make sure SDDbgValue.Invalid is initialized to false by all the constructors.

2010-03-25 05:50:26 +00:00

SDNodeOrdering.h

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SelectionDAG.cpp

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

2010-03-25 01:38:16 +00:00

SelectionDAGBuilder.cpp

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

2010-03-25 01:38:16 +00:00

SelectionDAGBuilder.h

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SelectionDAGISel.cpp

Emit dwarf variable info communicated by code generator through DBG_VALUE machine instructions.

2010-03-15 18:33:46 +00:00

SelectionDAGPrinter.cpp

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TargetLowering.cpp

Remove the ConvertActions table and associated code, which is unused.

2010-03-24 00:53:38 +00:00