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https://github.com/c64scene-ar/llvm-6502.git
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50b8835451
Summary: As a side-quest for D6629 jvoung pointed out that I should use -verify-machineinstrs and this found a bug in x86-32's handling of EFLAGS for PUSHF/POPF. This patch fixes the use/def, and adds -verify-machineinstrs to all x86 tests which contain 'EFLAGS'. One exception: this patch leaves inline-asm-fpstack.ll as-is because it fails -verify-machineinstrs in a way unrelated to EFLAGS. This patch also modifies cmpxchg-clobber-flags.ll along the lines of what D6629 already does by also testing i386. Test Plan: ninja check Reviewers: t.p.northover, jvoung Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6687 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224359 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
2.4 KiB
LLVM
88 lines
2.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s
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declare i32 @bar()
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define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) {
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; CHECK-LABEL: test_intervening_call:
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; CHECK: cmpxchg
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; CHECK: pushf[[LQ:[lq]]]
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; CHECK-NEXT: pop[[LQ]] [[FLAGS:%.*]]
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; CHECK-NEXT: call[[LQ]] bar
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; CHECK-NEXT: push[[LQ]] [[FLAGS]]
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; CHECK-NEXT: popf[[LQ]]
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; CHECK-NEXT: jne
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%cx = cmpxchg i64* %foo, i64 %bar, i64 %baz seq_cst seq_cst
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%p = extractvalue { i64, i1 } %cx, 1
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call i32 @bar()
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br i1 %p, label %t, label %f
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t:
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ret i64 42
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f:
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ret i64 0
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}
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; Interesting in producing a clobber without any function calls.
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define i32 @test_control_flow(i32* %p, i32 %i, i32 %j) {
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; CHECK-LABEL: test_control_flow:
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; CHECK: cmpxchg
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; CHECK-NEXT: jne
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entry:
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%cmp = icmp sgt i32 %i, %j
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br i1 %cmp, label %loop_start, label %cond.end
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loop_start:
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br label %while.condthread-pre-split.i
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while.condthread-pre-split.i:
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%.pr.i = load i32* %p, align 4
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br label %while.cond.i
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while.cond.i:
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%0 = phi i32 [ %.pr.i, %while.condthread-pre-split.i ], [ 0, %while.cond.i ]
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%tobool.i = icmp eq i32 %0, 0
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br i1 %tobool.i, label %while.cond.i, label %while.body.i
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while.body.i:
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%.lcssa = phi i32 [ %0, %while.cond.i ]
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%1 = cmpxchg i32* %p, i32 %.lcssa, i32 %.lcssa seq_cst seq_cst
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%2 = extractvalue { i32, i1 } %1, 1
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br i1 %2, label %cond.end.loopexit, label %while.condthread-pre-split.i
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cond.end.loopexit:
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %i, %entry ], [ 0, %cond.end.loopexit ]
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ret i32 %cond
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}
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; This one is an interesting case because CMOV doesn't have a chain
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; operand. Naive attempts to limit cmpxchg EFLAGS use are likely to fail here.
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define i32 @test_feed_cmov(i32* %addr, i32 %desired, i32 %new) {
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; CHECK-LABEL: test_feed_cmov:
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; CHECK: cmpxchg
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; CHECK: pushf[[LQ:[lq]]]
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; CHECK-NEXT: pop[[LQ]] [[FLAGS:%.*]]
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; CHECK-NEXT: call[[LQ]] bar
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; CHECK-NEXT: push[[LQ]] [[FLAGS]]
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; CHECK-NEXT: popf[[LQ]]
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%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
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%success = extractvalue { i32, i1 } %res, 1
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%rhs = call i32 @bar()
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%ret = select i1 %success, i32 %new, i32 %rhs
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ret i32 %ret
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}
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