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1e3da044d8
The v1i128 type is needed for the quadword add/substract instructions introduced in POWER8. Futhermore, the PowerPC ABI specifies that parameters of type v1i128 are to be passed in a single vector register, while parameters of type i128 are passed in pairs of GPRs. Thus, it is necessary to be able to differentiate between v1i128 and i128 in LLVM. http://reviews.llvm.org/D8564 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235198 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
784 B
TableGen
31 lines
784 B
TableGen
// RUN: llvm-tblgen -gen-intrinsic %s | FileCheck %s
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// XFAIL: vg_leak
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class IntrinsicProperty;
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class ValueType<int size, int value> {
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string Namespace = "MVT";
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int Size = size;
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int Value = value;
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}
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class LLVMType<ValueType vt> {
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ValueType VT = vt;
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}
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class Intrinsic<string name, list<LLVMType> param_types = []> {
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string LLVMName = name;
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bit isTarget = 0;
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string TargetPrefix = "";
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list<LLVMType> RetTypes = [];
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list<LLVMType> ParamTypes = param_types;
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list<IntrinsicProperty> Properties = [];
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}
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// isVoid needs to match the definition in ValueTypes.td
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def isVoid : ValueType<0, 57>; // Produces no value
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def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
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// CHECK: /* 0 */ 0, 28, 0,
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def int_foo : Intrinsic<"llvm.foo", [llvm_vararg_ty]>;
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