Evan Cheng c4b527ac06 DAGCombine's logic for forming pre- and post- indexed loads / stores were being ... overly conservative. It was concerned about cases where it would prohibit folding simple [r, c] addressing modes. e.g. ldr r0, [r2] ldr r1, [r2, #4] => ldr r0, [r2], #4 ldr r1, [r2] Change the logic to look for such cases which allows it to form indexed memory ops more aggressively. rdar://10674430 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148086 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-13 01:37:24 +00:00
..
CMakeLists.txt	build/CMake: Finish removal of add_llvm_library_dependencies.	2011-11-29 19:25:30 +00:00
DAGCombiner.cpp	DAGCombine's logic for forming pre- and post- indexed loads / stores were being	2012-01-13 01:37:24 +00:00
FastISel.cpp	[fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle	2011-12-13 17:45:06 +00:00
FunctionLoweringInfo.cpp	An array of chars of length 8 will also cause the stack protector to be inserted	2011-11-02 23:20:58 +00:00
InstrEmitter.cpp	Add bundle aware API for querying instruction properties and switch the code	2011-12-07 07:15:52 +00:00
InstrEmitter.h	Simplify EXTRACT_SUBREG emission.	2011-10-05 20:26:40 +00:00
LegalizeDAG.cpp	Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Promote for those operations.	2012-01-12 21:46:18 +00:00
LegalizeFloatTypes.cpp	Added invariant field to the DAG.getLoad method and changed all calls.	2011-11-08 18:42:53 +00:00
LegalizeIntegerTypes.cpp	Remove unnecessary default cases in switches that cover all enum values.	2012-01-10 16:47:17 +00:00
LegalizeTypes.cpp	Remove unnecessary default cases in switches that cover all enum values.	2012-01-10 16:47:17 +00:00
LegalizeTypes.h	1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.	2011-10-21 11:42:07 +00:00
LegalizeTypesGeneric.cpp	Remove unnecessary default cases in switches that cover all enum values.	2012-01-10 16:47:17 +00:00
LegalizeVectorOps.cpp	Initial CodeGen support for CTTZ/CTLZ where a zero input produces an	2011-12-13 01:56:10 +00:00
LegalizeVectorTypes.cpp	On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used.	2012-01-11 20:19:17 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile
ScheduleDAGFast.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
ScheduleDAGRRList.cpp	Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling.	2011-12-07 22:24:28 +00:00
ScheduleDAGSDNodes.cpp	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	2011-07-01 21:01:15 +00:00
ScheduleDAGSDNodes.h	The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.	2011-06-27 18:34:12 +00:00
SDNodeDbgValue.h	Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.	2011-02-18 22:43:42 +00:00
SDNodeOrdering.h
SelectionDAG.cpp	Update DebugLoc while merging nodes at -O0.	2011-12-15 18:21:18 +00:00
SelectionDAGBuilder.cpp	Allow vector shuffle normalizing to use concat vector even if the sources are commuted in the shuffle mask.	2012-01-04 09:23:09 +00:00
SelectionDAGBuilder.h	Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo.	2011-12-20 20:03:10 +00:00
SelectionDAGISel.cpp	Allow targets to select source order pre-RA scheduler.	2012-01-12 18:27:52 +00:00
SelectionDAGPrinter.cpp	drop unneeded config.h includes	2011-12-22 23:04:07 +00:00
TargetLowering.cpp	Add 'llvm_unreachable' to passify GCC's understanding of the constraints	2012-01-10 18:08:01 +00:00
TargetSelectionDAGInfo.cpp