llvm-6502/lib/CodeGen
2005-10-07 15:30:32 +00:00
..
SelectionDAG implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through 2005-10-07 15:30:32 +00:00
AsmPrinter.cpp
BranchFolding.cpp
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp Expose the LiveInterval interfaces as public headers. 2005-09-21 04:19:09 +00:00
LiveIntervalAnalysis.cpp Expose the LiveInterval interfaces as public headers. 2005-09-21 04:19:09 +00:00
LiveVariables.cpp
MachineBasicBlock.cpp
MachineCodeEmitter.cpp
MachineFunction.cpp If a function has live ins/outs, print them 2005-08-31 22:34:59 +00:00
MachineInstr.cpp
Makefile
Passes.cpp
PHIElimination.cpp clean up this code a bit, no functionality change 2005-10-03 07:22:07 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp now that we have a reg class to spill with, get this info from the regclass 2005-09-30 17:19:22 +00:00
RegAllocIterativeScan.cpp Expose the LiveInterval interfaces as public headers. 2005-09-21 04:19:09 +00:00
RegAllocLinearScan.cpp Expose the LiveInterval interfaces as public headers. 2005-09-21 04:19:09 +00:00
RegAllocLocal.cpp Change this code ot pass register classes into the stack slot spiller/reloader 2005-09-30 01:29:00 +00:00
RegAllocSimple.cpp Change this code ot pass register classes into the stack slot spiller/reloader 2005-09-30 01:29:00 +00:00
TwoAddressInstructionPass.cpp
UnreachableBlockElim.cpp
VirtRegMap.cpp Fix the LLC regressions on X86 last night. In particular, when undoing 2005-10-06 17:19:06 +00:00
VirtRegMap.h