llvm-6502/test/CodeGen
Michael Liao c537f79dcd Fix PR15355
- Clear 'mayStore' flag when loading from the atomic variable before the
  spin loop
- Clear kill flag from one use to multiple use in registers forming the
  address to that atomic variable
- don't use a physical register as live-in register in BB (neither entry
  nor landing pad.) by copying it into virtual register

(patch by Cameron Zwarich)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176538 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06 00:17:04 +00:00
..
AArch64 AArch64: be more careful resorting to inefficient addressing for weak vars. 2013-02-28 14:36:31 +00:00
ARM ARM NEON: Fix v2f32 float intrinsics 2013-03-02 19:38:33 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon reverting patch 176508. 2013-03-05 20:29:23 +00:00
MBlaze
Mips [mips] Remove android calling convention. 2013-03-05 23:22:30 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Fix PR15332 (patch by Florian Zeitz). 2013-02-26 21:28:57 +00:00
R600 R600: Turn BUILD_VECTOR into Reg_Sequence 2013-03-05 15:04:49 +00:00
SI
SPARC
Thumb llvm/test/CodeGen/Thumb/iabs.ll: Add explicit -mtriple=thumb-unknown-unknown to appease win32 hosts. 2013-03-05 02:18:52 +00:00
Thumb2 ARM: Creating a vector from a lane of another. 2013-03-02 20:16:24 +00:00
X86 Fix PR15355 2013-03-06 00:17:04 +00:00
XCore