llvm-6502/test/MC
Jozef Kolek c589d1b3bc [mips][microMIPSr6] Implement CACHE and PREF instructions
Implement CACHE and PREF instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8893


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-21 11:17:25 +00:00
..
AArch64 [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
ARM Write relocation sections contiguously. 2015-04-17 08:11:38 +00:00
AsmParser Add support for .ifnes psuedo-op. 2015-03-18 14:20:54 +00:00
COFF Add a proper fix for pr23025. 2015-04-17 11:27:13 +00:00
Disassembler [mips][microMIPSr6] Implement CACHE and PREF instructions 2015-04-21 11:17:25 +00:00
ELF Look past locals in comdats. 2015-04-20 12:44:06 +00:00
Hexagon Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
MachO MC: For variable symbols, maintain MCSymbol::Section as a cache. 2015-04-03 01:46:11 +00:00
Markup
Mips [mips][microMIPSr6] Implement CACHE and PREF instructions 2015-04-21 11:17:25 +00:00
PowerPC Update tests to not be as dependent on section numbers. 2015-04-15 15:59:37 +00:00
R600 R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
Sparc
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
X86 AVX-512: Added logical and arithmetic instructions for SKX 2015-04-21 10:27:40 +00:00