llvm-6502/lib/Target/Mips
Reed Kotler c673f9c6fe Fix a problem with dual mips16/mips32 mode. When the underlying processor
has hard float, when you compile the mips32 code you have to make sure
that it knows to compile any mips32 routines as hard float. I need to clean
up the way mips16 hard float is specified but I need to first think through
all the details. Mips16 always has a form of soft float, the difference being
whether the underlying hardware has floating point. So it's not really
necessary to pass the -soft-float to llvm since soft-float is always true
for mips16 by virtue of the fact that it will not register floating point
registers. By using this fact, I can simplify the way this is all handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-30 19:40:56 +00:00
..
AsmParser [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. 2013-08-28 00:55:15 +00:00
Disassembler [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. 2013-08-28 00:55:15 +00:00
InstPrinter [micromips] Print instruction alias "not" if the last operand of a nor is zero. 2013-08-21 01:18:46 +00:00
MCTargetDesc Changed comment 2013-08-27 19:45:28 +00:00
TargetInfo
CMakeLists.txt Turn MipsOptimizeMathLibCalls into a target-independent scalar transform 2013-08-23 10:27:02 +00:00
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td
MicroMipsInstrInfo.td [mips] Resolve register classes dynamically using ptr_rc to reduce the number of 2013-08-20 21:08:22 +00:00
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp Fix a problem with dual mips16/mips32 mode. When the underlying processor 2013-08-30 19:40:56 +00:00
Mips16HardFloat.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp Remove unused stdio.h includes 2013-08-18 08:29:51 +00:00
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp
Mips16ISelLowering.h
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips64InstrInfo.td [mips] Clean up definitions of move word from/to coprocessor instructions. 2013-08-28 00:42:50 +00:00
Mips.h Turn MipsOptimizeMathLibCalls into a target-independent scalar transform 2013-08-23 10:27:02 +00:00
Mips.td
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp
MipsAsmPrinter.h
MipsCallingConv.td [mips] Add support for calling convention CC_MipsO32_FP64, which is used when the 2013-08-20 23:38:40 +00:00
MipsCodeEmitter.cpp
MipsCondMov.td [mips] Fix instruction definitions that were incorrectly marked as code-gen-only. 2013-08-19 19:08:03 +00:00
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. 2013-08-28 00:55:15 +00:00
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td This patch implements trap instructions for mips. The test cases are added. 2013-08-26 10:02:40 +00:00
MipsInstrFPU.td [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. 2013-08-28 00:55:15 +00:00
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td [mips][msa] Added load/store intrinsics. 2013-08-28 12:04:29 +00:00
MipsISelDAGToDAG.cpp [mips][msa] Added load/store intrinsics. 2013-08-28 12:04:29 +00:00
MipsISelDAGToDAG.h [mips][msa] Added load/store intrinsics. 2013-08-28 12:04:29 +00:00
MipsISelLowering.cpp Fix a problem with dual mips16/mips32 mode. When the underlying processor 2013-08-30 19:40:56 +00:00
MipsISelLowering.h [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v 2013-08-28 12:14:50 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsMSAInstrFormats.td [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v 2013-08-28 12:14:50 +00:00
MipsMSAInstrInfo.td [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v 2013-08-28 12:14:50 +00:00
MipsOs16.cpp Add an option which permits the user to specify using a bitmask, that various 2013-08-20 20:53:09 +00:00
MipsOs16.h
MipsRegisterInfo.cpp [mips][msa] Added cfcmsa, and ctcmsa 2013-08-28 10:26:24 +00:00
MipsRegisterInfo.h [mips] Resolve register classes dynamically using ptr_rc to reduce the number of 2013-08-20 21:08:22 +00:00
MipsRegisterInfo.td [mips][msa] Added cfcmsa, and ctcmsa 2013-08-28 10:26:24 +00:00
MipsRelocations.h remove blanks, and some code format 2012-02-28 07:46:26 +00:00
MipsSchedule.td
MipsSEFrameLowering.cpp [mips] Define register class FGRH32 for the high half of the 64-bit floating 2013-08-20 22:58:56 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp [mips][msa] Added cfcmsa, and ctcmsa 2013-08-28 10:26:24 +00:00
MipsSEInstrInfo.h [mips] Add support for mfhc1 and mthc1. 2013-08-20 23:47:25 +00:00
MipsSEISelDAGToDAG.cpp [mips][msa] Added load/store intrinsics. 2013-08-28 12:04:29 +00:00
MipsSEISelDAGToDAG.h [mips][msa] Added load/store intrinsics. 2013-08-28 12:04:29 +00:00
MipsSEISelLowering.cpp Fix a problem with dual mips16/mips32 mode. When the underlying processor 2013-08-30 19:40:56 +00:00
MipsSEISelLowering.h [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v 2013-08-28 12:14:50 +00:00
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp
MipsSERegisterInfo.h
MipsSubtarget.cpp Fix a problem with dual mips16/mips32 mode. When the underlying processor 2013-08-30 19:40:56 +00:00
MipsSubtarget.h Fix a problem with dual mips16/mips32 mode. When the underlying processor 2013-08-30 19:40:56 +00:00
MipsTargetMachine.cpp Turn MipsOptimizeMathLibCalls into a target-independent scalar transform 2013-08-23 10:27:02 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h