Andrew Lenharth c6a335b72a nasty nasty patterns ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25463 91177308-0d34-0410-b5e6-96231b3b80d8		2006-01-19 20:49:37 +00:00
..
Alpha	nasty nasty patterns	2006-01-19 20:49:37 +00:00
CBackend	yet more C++ standards-compliance stuff.	2005-12-27 10:40:34 +00:00
IA64	fix boolean XOR (which fixes up comparisons..)	2006-01-19 15:18:56 +00:00
PowerPC	add a note	2006-01-19 02:09:38 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	implement support for f32 arguments past the first 6 words	2006-01-19 07:22:29 +00:00
SparcV8	implement support for f32 arguments past the first 6 words	2006-01-19 07:22:29 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	Avoid generating a redundant setcc.	2006-01-19 08:52:46 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp	Preparation of supporting scheduling info. Need to find info based on selected	2005-10-25 15:15:28 +00:00
Target.td	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
TargetData.cpp	Implement a new InvalidateStructLayoutInfo method and add some comments	2006-01-14 00:07:34 +00:00
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	bswap implementation	2006-01-14 03:14:10 +00:00
TargetSubtarget.cpp