llvm-6502/test/CodeGen
Bill Wendling c6df9883da Have the X86 back-end emit the alias instead of what's being aliased. In most
cases, it's much nicer and more informative reading the alias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14 01:11:51 +00:00
..
Alpha
ARM Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274>. 2011-04-13 21:01:19 +00:00
Blackfin
CBackend
CellSPU don't test for codegen of 'store undef' 2011-04-09 02:31:26 +00:00
CPP
Generic Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could 2011-04-09 07:05:44 +00:00
MBlaze Add scheduling information for the MBlaze backend. 2011-04-11 22:31:52 +00:00
Mips Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
MSP430
PowerPC
PTX
SPARC
SystemZ
Thumb
Thumb2 Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 2011-04-13 00:38:32 +00:00
X86 Have the X86 back-end emit the alias instead of what's being aliased. In most 2011-04-14 01:11:51 +00:00
XCore