llvm-6502/lib/CodeGen
Simon Pilgrim a0adcdb9ce [SelectionDAG] Fixed constant folding issue when legalised types are smaller then the folded type.
Found when testing with llvm-stress on i686 targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-10 14:14:51 +00:00
..
AsmPrinter DwarfDebug: Emit number of bytes in .debug_loc entry directly 2015-05-06 19:11:20 +00:00
SelectionDAG [SelectionDAG] Fixed constant folding issue when legalised types are smaller then the folded type. 2015-05-10 14:14:51 +00:00
AggressiveAntiDepBreaker.cpp
AggressiveAntiDepBreaker.h Test commit: fix typo in comment. 2015-04-22 17:42:37 +00:00
AllocationOrder.cpp
AllocationOrder.h
Analysis.cpp CodeGen: move over-zealous assert into actual if statement. 2015-05-06 20:07:38 +00:00
AntiDepBreaker.h
AtomicExpandPass.cpp
BasicTargetTransformInfo.cpp
BranchFolding.cpp Don't rewrite jumps to empty BBs to landing pads. 2015-04-30 18:58:23 +00:00
BranchFolding.h
CalcSpillWeights.cpp
CallingConvLower.cpp
CMakeLists.txt [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
CodeGen.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
CodeGenPrepare.cpp [Statepoint] Clean up Statepoint.h: accessor names. 2015-05-06 02:36:26 +00:00
CriticalAntiDepBreaker.cpp
CriticalAntiDepBreaker.h Use 'override/final' instead of 'virtual' for overridden methods 2015-04-11 02:11:45 +00:00
DeadMachineInstructionElim.cpp
DFAPacketizer.cpp
DwarfEHPrepare.cpp Stop calling DwarfEHPrepare from WinEHPrepare 2015-03-12 00:36:20 +00:00
EarlyIfConversion.cpp Add range iterators for post order and inverse post order. Use them 2015-04-15 17:41:42 +00:00
EdgeBundles.cpp
ErlangGC.cpp
ExecutionDepsFix.cpp remove function names from comments; NFC 2015-03-15 18:16:04 +00:00
ExpandISelPseudos.cpp
ExpandPostRAPseudos.cpp
GCMetadata.cpp Make the message associated with a fatal error slightly more helpful 2015-04-26 22:00:34 +00:00
GCMetadataPrinter.cpp
GCRootLowering.cpp Teach gcroot how to handle dynamically realigned frames 2015-04-02 05:00:40 +00:00
GCStrategy.cpp
GlobalMerge.cpp [opaque pointer type] Pass GlobalAlias the actual pointer type rather than decomposing it into pointee type + address space 2015-04-29 21:22:39 +00:00
IfConversion.cpp Handle dead defs in the if converter. 2015-05-06 22:51:04 +00:00
InlineSpiller.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
InterferenceCache.cpp
InterferenceCache.h
IntrinsicLowering.cpp
LatencyPriorityQueue.cpp
LexicalScopes.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveDebugVariables.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveDebugVariables.h IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
LiveInterval.cpp Oops, didn't mean to commit my debug fprintfs 2015-04-08 02:10:01 +00:00
LiveIntervalAnalysis.cpp Do not track subregister liveness when it brings no benefits 2015-03-19 00:21:58 +00:00
LiveIntervalUnion.cpp
LivePhysRegs.cpp Handle dead defs in the if converter. 2015-05-06 22:51:04 +00:00
LiveRangeCalc.cpp Do not track subregister liveness when it brings no benefits 2015-03-19 00:21:58 +00:00
LiveRangeCalc.h Do not track subregister liveness when it brings no benefits 2015-03-19 00:21:58 +00:00
LiveRangeEdit.cpp
LiveRegMatrix.cpp
LiveStackAnalysis.cpp
LiveVariables.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
LLVMBuild.txt
LLVMTargetMachine.cpp MC: Skip names of temporary symbols in object streamer 2015-05-06 21:34:34 +00:00
LocalStackSlotAllocation.cpp [ARM] Fix handling of thumb1 out-of-range frame offsets 2015-03-20 17:20:07 +00:00
MachineBasicBlock.cpp Remove superfluous .str() and replace std::string concatenation with Twine. 2015-03-27 17:51:30 +00:00
MachineBlockFrequencyInfo.cpp
MachineBlockPlacement.cpp [MBP] Spell the conditions the same way through out this if statement. 2015-04-15 13:39:42 +00:00
MachineBranchProbabilityInfo.cpp
MachineCombiner.cpp
MachineCopyPropagation.cpp [MachineCopyPropagation] Handle undef flags conservatively so that we do not 2015-04-23 21:17:39 +00:00
MachineCSE.cpp MachineCSE: Add a target query for the LookAheadLimit heurisitic 2015-05-09 00:56:07 +00:00
MachineDominanceFrontier.cpp
MachineDominators.cpp
MachineFunction.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
MachineFunctionAnalysis.cpp
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp
MachineInstr.cpp Add ChangeTo* to MachineOperand for symbols 2015-05-06 17:05:54 +00:00
MachineInstrBundle.cpp
MachineLICM.cpp [MachineLICM] Use newer model of register pressure sets. 2015-04-14 11:56:25 +00:00
MachineLoopInfo.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
MachineModuleInfo.cpp Re-commit "[SEH] Remove the old __C_specific_handler code now that WinEHPrepare works" 2015-04-23 23:22:33 +00:00
MachineModuleInfoImpls.cpp Clear the stub map in getSortedStubs. 2015-04-07 12:59:28 +00:00
MachinePassRegistry.cpp
MachinePostDominators.cpp
MachineRegionInfo.cpp
MachineRegisterInfo.cpp
MachineScheduler.cpp Complete the MachineScheduler fix made way back in r210390. 2015-03-27 06:10:13 +00:00
MachineSink.cpp Clear kill flags on all used registers when sinking instructions. 2015-05-08 17:54:32 +00:00
MachineSSAUpdater.cpp
MachineTraceMetrics.cpp Add range iterators for post order and inverse post order. Use them 2015-04-15 17:41:42 +00:00
MachineVerifier.cpp Fix typo 2015-04-30 23:20:56 +00:00
Makefile
module.modulemap
OcamlGC.cpp
OptimizePHIs.cpp
Passes.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
PeepholeOptimizer.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
PHIElimination.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
PostRASchedulerList.cpp Use 'override/final' instead of 'virtual' for overridden methods 2015-04-11 02:11:45 +00:00
ProcessImplicitDefs.cpp
PrologEpilogInserter.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
PseudoSourceValue.cpp
README.txt
RegAllocBase.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
RegAllocBase.h
RegAllocBasic.cpp
RegAllocFast.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
RegAllocGreedy.cpp RegAllocGreedy: Allow target to specify register class ordering. 2015-03-31 19:57:53 +00:00
RegAllocPBQP.cpp
RegisterClassInfo.cpp
RegisterCoalescer.cpp [RegisterCoalescer] Make sure each live-range has only one component, as 2015-05-06 22:41:50 +00:00
RegisterCoalescer.h
RegisterPressure.cpp Move private classes into anonymous namespaces 2015-03-23 12:30:58 +00:00
RegisterScavenging.cpp
ScheduleDAG.cpp
ScheduleDAGInstrs.cpp ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects 2015-05-08 23:52:00 +00:00
ScheduleDAGPrinter.cpp
ScoreboardHazardRecognizer.cpp
ShadowStackGC.cpp
ShadowStackGCLowering.cpp [opaque pointer type] API migration for GEP constant factories 2015-04-02 18:55:32 +00:00
ShrinkWrap.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
SjLjEHPrepare.cpp [opaque pointer type] More GEP API migrations 2015-04-04 21:07:10 +00:00
SlotIndexes.cpp [llvm] Replacing asserts with static_asserts where appropriate 2015-03-16 09:53:42 +00:00
Spiller.h
SpillPlacement.cpp
SpillPlacement.h Use 'override/final' instead of 'virtual' for overridden methods 2015-04-11 02:11:45 +00:00
SplitKit.cpp
SplitKit.h Fix spelling. 2015-05-02 00:44:07 +00:00
StackColoring.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
StackMapLivenessAnalysis.cpp Internalize the StackMapLiveness pass. 2015-03-24 13:20:54 +00:00
StackMaps.cpp [AsmPrinter] Make AsmPrinter's OutStreamer member a unique_ptr. 2015-04-24 19:11:51 +00:00
StackProtector.cpp
StackSlotColoring.cpp
StatepointExampleGC.cpp
TailDuplication.cpp Clear kill flags in tail duplication. 2015-05-07 21:48:26 +00:00
TargetFrameLoweringImpl.cpp
TargetInstrInfo.cpp Commute the internal flag on MachineOperands. 2015-04-30 23:14:14 +00:00
TargetLoweringBase.cpp CodeGen: Default overflow operations to expand so we don't have to assume targets are lying 2015-04-29 16:30:46 +00:00
TargetLoweringObjectFileImpl.cpp Implement unique sections with an unique ID. 2015-04-04 18:02:01 +00:00
TargetOptionsImpl.cpp Remove CFIFuncName from TargetOptions as it is currently unused. 2015-04-19 03:21:04 +00:00
TargetRegisterInfo.cpp
TargetSchedule.cpp
TwoAddressInstructionPass.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp Do not track subregister liveness when it brings no benefits 2015-03-19 00:21:58 +00:00
WinEHPrepare.cpp [WinEH] Improve fatal error message about failed demotion 2015-05-06 18:45:24 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.