Eli Friedman 27759f41ca PR3686: make the legalizer handle bitcast from i80 to x86 long double. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8

2009-03-04 06:23:34 +00:00

..

CallingConvLower.cpp

Add "inreg" field to CallSDNode (doesn't increase

2008-09-26 19:31:26 +00:00

CMakeLists.txt

Experimental post-pass scheduling support. Post-pass scheduling

2008-11-19 23:18:57 +00:00

DAGCombiner.cpp

Fix a problem with DAGCombine on 64b targets where folding

2009-03-01 23:44:07 +00:00

FastISel.cpp

Clean up dwarf writer, part 1. This eliminated the horrible recursive getGlobalVariablesUsing and replaced it something readable. It eliminated use of slow UniqueVector and replaced it with StringMap, SmallVector, and DenseMap, etc. It also fixed some non-deterministic behavior.

2009-02-25 07:04:34 +00:00

LegalizeDAG.cpp

Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.

2009-02-25 22:49:59 +00:00

LegalizeFloatTypes.cpp

bug 3610: Floating point vaarg not softened.

2009-02-21 19:11:18 +00:00

LegalizeIntegerTypes.cpp

PR3686: make the legalizer handle bitcast from i80 to x86 long double.

2009-03-04 06:23:34 +00:00

LegalizeTypes.cpp

Use getDebugLoc forwarder instead of getNode()->getDebugLoc.

2009-02-07 19:59:05 +00:00

LegalizeTypes.h

PR3686: make the legalizer handle bitcast from i80 to x86 long double.

2009-03-04 06:23:34 +00:00

LegalizeTypesGeneric.cpp

Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.

2009-02-25 22:49:59 +00:00

LegalizeVectorTypes.cpp

Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.

2009-02-25 22:49:59 +00:00

Makefile

Removed trailing whitespace from Makefiles.

2009-01-09 16:44:42 +00:00

ScheduleDAGFast.cpp

When scheduling a block in parts, keep track of the overall

2009-02-11 04:27:20 +00:00

ScheduleDAGList.cpp

When scheduling a block in parts, keep track of the overall

2009-02-11 04:27:20 +00:00

ScheduleDAGRRList.cpp

Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.

2009-03-04 01:41:49 +00:00

ScheduleDAGSDNodes.cpp

When scheduling a block in parts, keep track of the overall

2009-02-11 04:27:20 +00:00

ScheduleDAGSDNodes.h

When scheduling a block in parts, keep track of the overall

2009-02-11 04:27:20 +00:00

ScheduleDAGSDNodesEmit.cpp

When scheduling a block in parts, keep track of the overall

2009-02-11 04:27:20 +00:00

SelectionDAG.cpp

Generalize BuildVectorSDNode::isConstantSplat to use APInts and handle

2009-03-02 23:24:16 +00:00

SelectionDAGBuild.cpp

Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.

2009-02-25 22:49:59 +00:00

SelectionDAGBuild.h

Generate these labels when we're in "fast" mode, not simply when we're no in

2009-02-19 21:12:54 +00:00

SelectionDAGISel.cpp

- Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit

2009-02-24 02:35:30 +00:00

SelectionDAGPrinter.cpp

Move ScheduleDAGSDNodes.h to be a private header. Front-ends

2009-02-06 17:22:58 +00:00

TargetLowering.cpp

The DAG combiner was performing a BT combine. The BT combine had a value of -1,

2009-03-04 00:18:06 +00:00