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9b7ff12dd1
This is possible now that we now longer provide an interface to iterate the interference overlaps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137397 91177308-0d34-0410-b5e6-96231b3b80d8
193 lines
6.6 KiB
C++
193 lines
6.6 KiB
C++
//===-- LiveIntervalUnion.h - Live interval union data struct --*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// LiveIntervalUnion is a union of live segments across multiple live virtual
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// registers. This may be used during coalescing to represent a congruence
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// class, or during register allocation to model liveness of a physical
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// register.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEINTERVALUNION
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#define LLVM_CODEGEN_LIVEINTERVALUNION
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/CodeGen/LiveInterval.h"
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#include <algorithm>
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namespace llvm {
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class MachineLoopRange;
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class TargetRegisterInfo;
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#ifndef NDEBUG
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// forward declaration
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template <unsigned Element> class SparseBitVector;
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typedef SparseBitVector<128> LiveVirtRegBitSet;
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#endif
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/// Compare a live virtual register segment to a LiveIntervalUnion segment.
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inline bool
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overlap(const LiveRange &VRSeg,
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const IntervalMap<SlotIndex, LiveInterval*>::const_iterator &LUSeg) {
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return VRSeg.start < LUSeg.stop() && LUSeg.start() < VRSeg.end;
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}
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/// Union of live intervals that are strong candidates for coalescing into a
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/// single register (either physical or virtual depending on the context). We
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/// expect the constituent live intervals to be disjoint, although we may
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/// eventually make exceptions to handle value-based interference.
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class LiveIntervalUnion {
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// A set of live virtual register segments that supports fast insertion,
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// intersection, and removal.
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// Mapping SlotIndex intervals to virtual register numbers.
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typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
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public:
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// SegmentIter can advance to the next segment ordered by starting position
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// which may belong to a different live virtual register. We also must be able
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// to reach the current segment's containing virtual register.
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typedef LiveSegments::iterator SegmentIter;
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// LiveIntervalUnions share an external allocator.
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typedef LiveSegments::Allocator Allocator;
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class Query;
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private:
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const unsigned RepReg; // representative register number
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unsigned Tag; // unique tag for current contents.
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LiveSegments Segments; // union of virtual reg segments
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public:
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LiveIntervalUnion(unsigned r, Allocator &a) : RepReg(r), Tag(0), Segments(a)
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{}
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// Iterate over all segments in the union of live virtual registers ordered
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// by their starting position.
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SegmentIter begin() { return Segments.begin(); }
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SegmentIter end() { return Segments.end(); }
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SegmentIter find(SlotIndex x) { return Segments.find(x); }
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bool empty() const { return Segments.empty(); }
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SlotIndex startIndex() const { return Segments.start(); }
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// Provide public access to the underlying map to allow overlap iteration.
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typedef LiveSegments Map;
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const Map &getMap() { return Segments; }
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/// getTag - Return an opaque tag representing the current state of the union.
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unsigned getTag() const { return Tag; }
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/// changedSince - Return true if the union change since getTag returned tag.
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bool changedSince(unsigned tag) const { return tag != Tag; }
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// Add a live virtual register to this union and merge its segments.
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void unify(LiveInterval &VirtReg);
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// Remove a live virtual register's segments from this union.
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void extract(LiveInterval &VirtReg);
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// Remove all inserted virtual registers.
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void clear() { Segments.clear(); ++Tag; }
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// Print union, using TRI to translate register names
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void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
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#ifndef NDEBUG
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// Verify the live intervals in this union and add them to the visited set.
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void verify(LiveVirtRegBitSet& VisitedVRegs);
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#endif
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/// Query interferences between a single live virtual register and a live
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/// interval union.
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class Query {
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LiveIntervalUnion *LiveUnion;
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LiveInterval *VirtReg;
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LiveInterval::iterator VirtRegI; // current position in VirtReg
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SegmentIter LiveUnionI; // current position in LiveUnion
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SmallVector<LiveInterval*,4> InterferingVRegs;
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bool CheckedFirstInterference;
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bool SeenAllInterferences;
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bool SeenUnspillableVReg;
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unsigned Tag, UserTag;
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public:
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Query(): LiveUnion(), VirtReg(), Tag(0), UserTag(0) {}
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Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
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LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
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SeenAllInterferences(false), SeenUnspillableVReg(false)
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{}
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void clear() {
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LiveUnion = NULL;
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VirtReg = NULL;
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InterferingVRegs.clear();
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CheckedFirstInterference = false;
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SeenAllInterferences = false;
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SeenUnspillableVReg = false;
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Tag = 0;
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UserTag = 0;
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}
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void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) {
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assert(VReg && LIU && "Invalid arguments");
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if (UserTag == UTag && VirtReg == VReg &&
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LiveUnion == LIU && !LIU->changedSince(Tag)) {
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// Retain cached results, e.g. firstInterference.
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return;
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}
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clear();
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LiveUnion = LIU;
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VirtReg = VReg;
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Tag = LIU->getTag();
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UserTag = UTag;
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}
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LiveInterval &virtReg() const {
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assert(VirtReg && "uninitialized");
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return *VirtReg;
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}
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// Does this live virtual register interfere with the union?
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bool checkInterference() { return collectInterferingVRegs(1); }
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// Count the virtual registers in this union that interfere with this
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// query's live virtual register, up to maxInterferingRegs.
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unsigned collectInterferingVRegs(unsigned MaxInterferingRegs = UINT_MAX);
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// Was this virtual register visited during collectInterferingVRegs?
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bool isSeenInterference(LiveInterval *VReg) const;
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// Did collectInterferingVRegs collect all interferences?
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bool seenAllInterferences() const { return SeenAllInterferences; }
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// Did collectInterferingVRegs encounter an unspillable vreg?
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bool seenUnspillableVReg() const { return SeenUnspillableVReg; }
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// Vector generated by collectInterferingVRegs.
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const SmallVectorImpl<LiveInterval*> &interferingVRegs() const {
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return InterferingVRegs;
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}
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/// checkLoopInterference - Return true if there is interference overlapping
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/// Loop.
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bool checkLoopInterference(MachineLoopRange*);
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private:
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Query(const Query&); // DO NOT IMPLEMENT
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void operator=(const Query&); // DO NOT IMPLEMENT
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};
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};
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} // end namespace llvm
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#endif // !defined(LLVM_CODEGEN_LIVEINTERVALUNION)
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