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Analysis.h
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AsmPrinter.h
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Trailing whitespace.
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2010-07-01 01:00:22 +00:00 |
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BinaryObject.h
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CalcSpillWeights.h
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CallingConvLower.h
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Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands
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2010-07-06 15:39:54 +00:00 |
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FastISel.h
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Teach fast-isel to avoid loading a value from memory when it's already
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2010-07-01 03:49:38 +00:00 |
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GCMetadata.h
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Trailing whitespace.
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2010-07-01 01:00:22 +00:00 |
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GCMetadataPrinter.h
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Trailing whitespace.
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2010-07-01 01:00:22 +00:00 |
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GCs.h
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GCStrategy.h
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IntrinsicLowering.h
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ISDOpcodes.h
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When splitting a VAARG, remember its alignment.
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2010-06-26 18:22:20 +00:00 |
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JITCodeEmitter.h
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LatencyPriorityQueue.h
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Eliminate the use of PriorityQueue and just use a std::vector,
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2010-05-26 18:52:00 +00:00 |
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LinkAllAsmWriterComponents.h
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LinkAllCodegenComponents.h
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Remove the local register allocator.
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2010-06-15 21:58:33 +00:00 |
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LiveInterval.h
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Rematerialize as much as possible before inserting spills and reloads.
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2010-07-02 17:44:57 +00:00 |
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LiveIntervalAnalysis.h
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Remove the now unused LiveIntervals::getVNInfoSourceReg().
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2010-06-24 20:18:15 +00:00 |
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LiveStackAnalysis.h
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LiveVariables.h
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MachineBasicBlock.h
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Reapply r107655 with fixes; insert the pseudo instruction into
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2010-07-06 20:24:04 +00:00 |
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MachineCodeEmitter.h
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change EH related stuff (other than EH_LABEL) to use MCSymbol
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2010-03-14 01:41:15 +00:00 |
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MachineCodeInfo.h
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MachineConstantPool.h
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MachineDominators.h
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MachineFrameInfo.h
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Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
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2010-07-03 00:40:23 +00:00 |
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MachineFunction.h
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Revert r107205 and r107207.
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2010-06-29 22:34:52 +00:00 |
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MachineFunctionAnalysis.h
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MachineFunctionPass.h
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Make MachineFunctionPass::createPrinterPass private, as no subclasses
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2010-06-05 01:19:12 +00:00 |
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MachineInstr.h
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Detect and handle COPY in many places.
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2010-07-03 00:04:37 +00:00 |
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MachineInstrBuilder.h
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MachineJumpTableInfo.h
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Add explicit keywords.
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2010-06-18 19:04:37 +00:00 |
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MachineLocation.h
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MachineLoopInfo.h
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Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out
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2010-06-22 17:25:57 +00:00 |
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MachineMemOperand.h
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MachineModuleInfo.h
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MachineModuleInfoImpls.h
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MachineOperand.h
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Add a TargetRegisterInfo::composeSubRegIndices hook with a default
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2010-05-28 18:18:53 +00:00 |
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MachinePassRegistry.h
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MachineRegisterInfo.h
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Begin implementation of an inline spiller.
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2010-06-29 23:58:39 +00:00 |
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MachineRelocation.h
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MachineSSAUpdater.h
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Combine the implementations of the core part of the SSAUpdater and
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2010-05-04 23:18:19 +00:00 |
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MachORelocation.h
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ObjectCodeEmitter.h
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Passes.h
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Remove the local register allocator.
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2010-06-15 21:58:33 +00:00 |
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PostRAHazardRecognizer.h
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Add missing include to unbreak the build.
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2010-06-14 22:44:26 +00:00 |
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ProcessImplicitDefs.h
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PseudoSourceValue.h
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RegAllocRegistry.h
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RegisterCoalescer.h
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Be more forgiving when calculating alias interference for physreg coalescing.
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2010-07-06 20:31:51 +00:00 |
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RegisterScavenging.h
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Add register-reuse to frame-index register scavenging. When a target uses
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2009-10-07 17:12:56 +00:00 |
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RuntimeLibcalls.h
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back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
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2010-06-18 23:03:10 +00:00 |
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ScheduleDAG.h
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Change push_all to a non-virtual function and implement it in the
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2010-05-26 01:10:55 +00:00 |
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ScheduleHazardRecognizer.h
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SchedulerRegistry.h
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Add a hybrid bottom up scheduler that reduce register usage while avoiding
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2010-05-20 06:13:19 +00:00 |
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SelectionDAG.h
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Propagate debug loc.
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2010-07-06 22:08:15 +00:00 |
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SelectionDAGISel.h
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CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.
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2010-07-06 22:19:37 +00:00 |
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SelectionDAGNodes.h
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Propagate debug loc.
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2010-07-06 22:08:15 +00:00 |
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SlotIndexes.h
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Handle unindexed instructions in SlotIndices.
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2010-07-02 19:54:45 +00:00 |
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TargetLoweringObjectFileImpl.h
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More data/parsing support for tls directives. Add a few more testcases
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2010-05-17 22:53:55 +00:00 |
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ValueTypes.h
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Fix enum to address array bounds regression.
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2010-05-18 21:22:12 +00:00 |
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ValueTypes.td
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Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
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2010-05-13 23:55:47 +00:00 |
