Matt Arsenault c9cc488dfe R600/SI: Try to keep i32 mul on SALU ... Also fix bug this exposed where when legalizing an immediate operand, a v_mov_b32 would be created with a VSrc dest register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217108 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-03 23:24:35 +00:00
..
AArch64	Reapply r216805 "[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR.""	2014-09-03 07:07:10 +00:00
ARM	Missing test from r216989	2014-09-02 22:46:18 +00:00
CPP
Generic	Add a regression test to sanity check the PBQP allocator.	2014-09-03 18:04:10 +00:00
Hexagon
Inputs
Mips	Replace -use-init-array with -use-ctors.	2014-09-02 13:54:53 +00:00
MSP430
NVPTX
PowerPC	Enable splitting indexing from loads with TargetConstants	2014-09-02 16:05:23 +00:00
R600	R600/SI: Try to keep i32 mul on SALU	2014-09-03 23:24:35 +00:00
SPARC
SystemZ
Thumb	Check-label a bit more specific	2014-09-03 13:32:08 +00:00
Thumb2
X86	[x86] Teach the new vector shuffle lowering about the simplest of	2014-09-03 22:48:34 +00:00
XCore