llvm-6502/test/CodeGen
Kalle Raiskila c9fda996fc Add preliminary v2f32 support for SPU. Like with v2i32, we just
duplicate the instructions and operate on half vectors. 

Also reorder code in SPUInstrInfo.td for better coherency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 10:25:47 +00:00
..
Alpha PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually 2010-08-01 21:13:28 +00:00
ARM Currently EH lowering code expects typeinfo to be global only. 2010-07-26 18:45:39 +00:00
Blackfin
CBackend
CellSPU Add preliminary v2f32 support for SPU. Like with v2i32, we just 2010-08-02 10:25:47 +00:00
CPP
Generic Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself 2010-07-27 18:02:18 +00:00
MBlaze
Mips Fix PR7174, a couple o Mips fixes: 2010-07-20 08:37:04 +00:00
MSP430
PIC16
PowerPC PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR. 2010-08-02 00:18:19 +00:00
SPARC
SystemZ
Thumb Feed the right output into FileCheck. 2010-07-16 10:58:02 +00:00
Thumb2 Many Thumb2 instructions can reference the full ARM register set (i.e., 2010-07-30 02:41:01 +00:00
X86 Revert new AVX intrinsic tests. They are breaking buildbots and Bruno is 2010-07-31 22:36:03 +00:00
XCore