6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-18 12:29:21 +00:00
Code Issues Projects Releases Wiki Activity
ca0a4778a8
llvm-6502/lib/Target
History
Chris Lattner ca0a4778a8 Minor tweak to the branch selector. When emitting a two-way branch, and if 
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:06:26 +00:00
..
Alpha subtarget support for CIX and FIX extentions (the only 2 I care about right now) 2005-09-30 20:24:38 +00:00
CBackend fix CBackend/2005-09-27-VolatileFuncPtr.ll 2005-09-27 20:52:44 +00:00
IA64 these registers don't belong to any register classes, so don't mark them 2005-09-30 06:42:24 +00:00
PowerPC Minor tweak to the branch selector. When emitting a two-way branch, and if 2005-10-01 23:06:26 +00:00
Skeleton CR registers are not used by this "target" 2005-09-30 06:43:58 +00:00
Sparc Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcV8 Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcV9 Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
X86 simplify this code using the new regclass info passed in 2005-09-30 17:12:38 +00:00
Makefile Implement the --enable-targets= feature of the configure script. The make 2005-04-22 17:20:11 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Print: 2005-09-07 05:44:14 +00:00
Target.td Now that self referential classes are supported, get rid of a work-around. 2005-09-30 04:13:23 +00:00
TargetData.cpp Update to use the new MathExtras.h support for log2 computation. 2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp Convert tabs to spaces 2005-04-22 17:54:37 +00:00
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp Convert tabs to spaces 2005-04-22 17:54:37 +00:00
TargetSubtarget.cpp Eliminate all remaining tabs and trailing spaces. 2005-07-27 06:12:32 +00:00