llvm-6502/lib/CodeGen/SelectionDAG
Chris Lattner d0f6d18aa8 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
if after legalize.  This fixes IA64 failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24725 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15 19:02:38 +00:00
..
DAGCombiner.cpp Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support 2005-12-15 19:02:38 +00:00
LegalizeDAG.cpp Lowering constant pool entries on ppc exposed a bug in the recently added 2005-12-13 03:03:23 +00:00
Makefile
ScheduleDAG.cpp Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
SelectionDAG.cpp Added new getNode and getTargetNode variants for X86 stores. 2005-12-10 00:37:58 +00:00
SelectionDAGISel.cpp Don't lump the filename and working dir together 2005-12-13 17:40:33 +00:00
SelectionDAGPrinter.cpp Added an index field to GlobalAddressSDNode so it can represent X+12, etc. 2005-11-30 02:04:11 +00:00
TargetLowering.cpp Add the majority of the vector machien value types we expect to support, 2005-11-29 05:45:29 +00:00