llvm-6502/test/CodeGen
Nadav Rotem cba46dca47 Add a triple to the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15 00:10:23 +00:00
..
AArch64 Test case hygiene. 2013-03-09 18:25:40 +00:00
ARM ARM cost model: Increase cost of some vector selects we do terrible on 2013-03-14 19:17:02 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: Removed asserts regarding alignment and offset. 2013-03-14 19:08:03 +00:00
Inputs Upgrading debug info test cases to be (more) compatible with the current debug info format. 2013-03-11 22:37:40 +00:00
MBlaze Remove duplicate test contents. 2013-03-11 22:10:14 +00:00
Mips Remove duplicate test contents. 2013-03-11 22:10:14 +00:00
MSP430 Remove duplicate test contents. 2013-03-11 22:10:14 +00:00
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Not all PPC functions with a frame pointer need a RS spill slot 2013-03-14 19:34:32 +00:00
R600 R600: Factorize code handling Const Read Port limitation 2013-03-14 15:50:45 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Remove duplicate test contents. 2013-03-11 22:10:14 +00:00
Thumb Remove duplicate test contents. 2013-03-11 22:10:14 +00:00
Thumb2 SDAG: Handle scalarizing an extend of a <1 x iN> vector. 2013-03-07 05:47:54 +00:00
X86 Add a triple to the test. 2013-03-15 00:10:23 +00:00
XCore Remove duplicate test contents. 2013-03-11 22:10:14 +00:00