llvm-6502/test/MC/Disassembler/ARM/thumb-MSR-MClass.txt
Renato Golin 09e28e39f0 Thumb2 M-class MSR instruction support changes
This patch implements a few changes related to the Thumb2 M-class MSR instruction:
 * better handling of unpredictable encodings,
 * recognition of the _g and _nzcvqg variants by the asm parser only if the DSP
   extension is available, preferred output of MSR APSR moves with the _<bits>
   suffix for v7-M.

Patch by Petr Pavlu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216874 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-01 11:25:07 +00:00

95 lines
2.0 KiB
Plaintext

# RUN: llvm-mc --disassemble %s -triple=thumbv7em | FileCheck %s
#------------------------------------------------------------------------------
# MRS
#------------------------------------------------------------------------------
# CHECK: mrs r0, apsr
# CHECK: mrs r0, iapsr
# CHECK: mrs r0, eapsr
# CHECK: mrs r0, xpsr
# CHECK: mrs r0, ipsr
# CHECK: mrs r0, epsr
# CHECK: mrs r0, iepsr
# CHECK: mrs r0, msp
# CHECK: mrs r0, psp
# CHECK: mrs r0, primask
# CHECK: mrs r0, basepri
# CHECK: mrs r0, basepri_max
# CHECK: mrs r0, faultmask
# CHECK: mrs r0, control
0xef 0xf3 0x00 0x80
0xef 0xf3 0x01 0x80
0xef 0xf3 0x02 0x80
0xef 0xf3 0x03 0x80
0xef 0xf3 0x05 0x80
0xef 0xf3 0x06 0x80
0xef 0xf3 0x07 0x80
0xef 0xf3 0x08 0x80
0xef 0xf3 0x09 0x80
0xef 0xf3 0x10 0x80
0xef 0xf3 0x11 0x80
0xef 0xf3 0x12 0x80
0xef 0xf3 0x13 0x80
0xef 0xf3 0x14 0x80
#------------------------------------------------------------------------------
# MSR
#------------------------------------------------------------------------------
# CHECK: msr apsr_nzcvq, r0
# CHECK: msr apsr_g, r0
# CHECK: msr apsr_nzcvqg, r0
0x80 0xf3 0x00 0x88
0x80 0xf3 0x00 0x84
0x80 0xf3 0x00 0x8c
# CHECK: msr iapsr_nzcvq, r0
# CHECK: msr iapsr_g, r0
# CHECK: msr iapsr_nzcvqg, r0
0x80 0xf3 0x01 0x88
0x80 0xf3 0x01 0x84
0x80 0xf3 0x01 0x8c
# CHECK: msr eapsr_nzcvq, r0
# CHECK: msr eapsr_g, r0
# CHECK: msr eapsr_nzcvqg, r0
0x80 0xf3 0x02 0x88
0x80 0xf3 0x02 0x84
0x80 0xf3 0x02 0x8c
# CHECK: msr xpsr_nzcvq, r0
# CHECK: msr xpsr_g, r0
# CHECK: msr xpsr_nzcvqg, r0
0x80 0xf3 0x03 0x88
0x80 0xf3 0x03 0x84
0x80 0xf3 0x03 0x8c
# CHECK: msr ipsr, r0
# CHECK: msr epsr, r0
# CHECK: msr iepsr, r0
# CHECK: msr msp, r0
# CHECK: msr psp, r0
# CHECK: msr primask, r0
# CHECK: msr basepri, r0
# CHECK: msr basepri_max, r0
# CHECK: msr faultmask, r0
# CHECK: msr control, r0
0x80 0xf3 0x05 0x88
0x80 0xf3 0x06 0x88
0x80 0xf3 0x07 0x88
0x80 0xf3 0x08 0x88
0x80 0xf3 0x09 0x88
0x80 0xf3 0x10 0x88
0x80 0xf3 0x11 0x88
0x80 0xf3 0x12 0x88
0x80 0xf3 0x13 0x88
0x80 0xf3 0x14 0x88