llvm-6502/test/MC
Benjamin Kramer 4bf8188289 [MC/Dwarf] Encode DW_CFA_advance_loc in target endianess.
This matches GNU as output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 15:14:35 +00:00
..
AArch64 [AArch64] AsmParser should be case insensitive about accepting vector register names. 2015-06-08 21:32:16 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM [ARM] Add support for -sp- FPUs and FPU none to TargetParser 2015-06-05 13:31:19 +00:00
AsmParser Teaching llvm-mc how to understand the defsym command line option. This allows integer-constant symbols to be defined on the command line and used during assembly. 2015-06-07 01:46:24 +00:00
COFF Revise test to run llc and llvm-mc separately. 2015-05-28 21:49:50 +00:00
Disassembler [mips][microMIPS] Implement ERET and ERETNC instructions 2015-06-11 10:22:46 +00:00
ELF Fix a regression in .pop_section. 2015-06-08 20:08:55 +00:00
Hexagon [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 2015-06-05 16:00:11 +00:00
MachO MC: Remove obsolete MachO UseAggressiveSymbolFolding. 2015-06-04 20:27:42 +00:00
Markup
Mips [MC/Dwarf] Encode DW_CFA_advance_loc in target endianess. 2015-06-17 15:14:35 +00:00
PowerPC Properly handle the mftb instruction. 2015-06-16 16:01:15 +00:00
Sparc [llvm-mc] The object form of the GNU triple should be the same as the string form. 2015-06-16 09:57:38 +00:00
SystemZ [SystemZ] Add z13 vector facility and MC support 2015-05-05 19:23:40 +00:00
X86 Add support for parsing the XOR operator in Intel syntax inline assembly. 2015-06-14 12:59:45 +00:00