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As specified in A8.8.72/A8.8.73/A8.8.74 in the ARM ARM, all variants of the ARM LDRD instruction have the following two constraints: LDRD<c> <Rt>, <Rt2>, ... (a) Rt must be even-numbered and not r14 (b) Rt2 must be R(t+1) If those two constraints are not met the result of executing the instruction will be unpredictable. Constraint (b) was already enforced, this commit adds support for constraint (a). Fixes rdar://14479793. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191520 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
520 B
ArmAsm
21 lines
520 B
ArmAsm
// RUN: not llvm-mc -arch arm -mattr=+v5te \
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// RUN: < %s >/dev/null 2> %t
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// RUN: grep "error: Rt must be even-numbered" %t | count 7
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// RUN: grep "error: Rt can't be R14" %t | count 7
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// rdar://14479793
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ldrd r1, r2, [pc, #0]
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ldrd lr, pc, [pc, #0]
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ldrd r1, r2, [r3, #4]
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ldrd lr, pc, [r3, #4]
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ldrd r1, r2, [r3], #4
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ldrd lr, pc, [r3], #4
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ldrd r1, r2, [r3, #4]!
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ldrd lr, pc, [r3, #4]!
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ldrd r1, r2, [r3, -r4]!
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ldrd lr, pc, [r3, -r4]!
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ldrd r1, r2, [r3, r4]
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ldrd lr, pc, [r3, r4]
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ldrd r1, r2, [r3], r4
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ldrd lr, pc, [r3], r4
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