llvm-6502/test/CodeGen
Scott Michel cd730fa337 CellSPU: Add new directory under tests/CodeGen/CellSPU to retain tests that
aren't part of the test suite but are generally useful nonetheless, and can
be expanded later to test the backend against the actual Cell SPU system.

There's basically no other good place to put this code, so put it here for
the time being.

- vecoperations.c: Vector shuffles for all supported vector types, tests
  for v16i8 add and multiply.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60566 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-05 00:01:00 +00:00
..
Alpha Correct some thinkos in the expansion of ADD/SUB 2008-11-12 08:23:26 +00:00
ARM - Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction. 2008-11-20 02:32:35 +00:00
CBackend Fix PR2907 by digging through constant expressions to find FP constants that 2008-10-22 04:53:16 +00:00
CellSPU CellSPU: Add new directory under tests/CodeGen/CellSPU to retain tests that 2008-12-05 00:01:00 +00:00
CPP Put CPPBackend tests into their own directory and run them only if they're 2008-07-10 22:35:32 +00:00
Generic Test add-with-overflow with fast ISel. 2008-11-24 05:23:38 +00:00
IA64 sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
Mips Fix PR2667: add soft float support for sint_to_fp/uint_to_fp 2008-11-10 17:36:26 +00:00
PowerPC Remove a (what appears to be) overly strict assertion. Here is what happened: 2008-12-02 21:57:09 +00:00
SPARC Add testcase for 'r' inline asm operand 2008-10-10 20:28:59 +00:00
X86 Temporarily revert r60519. It was causing a bootstrap failure: 2008-12-04 04:07:00 +00:00
XCore Add support for ISD::TRAP to the XCore backend 2008-12-03 10:59:16 +00:00