Evan Cheng dd99f3a7dc Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8		2009-12-12 20:03:14 +00:00
..
Alpha
ARM	- Support inline asm 'w' constraint for 128-bit vector types.	2009-12-08 23:06:22 +00:00
Blackfin
CBackend
CellSPU	Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.	2009-12-09 01:53:58 +00:00
CPP
Generic	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
Mips	Support PIC loading of constant pool entries	2009-11-25 12:17:58 +00:00
MSP430	Lower setcc branchless, if this is profitable.	2009-12-11 23:01:29 +00:00
PIC16	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
PowerPC	ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies.	2009-11-25 21:13:39 +00:00
SPARC
SystemZ
Thumb	More consistent thumb1 asm printing.	2009-11-19 06:57:41 +00:00
Thumb2	Dynamic stack realignment use of sp register as source/dest register	2009-12-06 22:39:50 +00:00
X86	Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.	2009-12-12 20:03:14 +00:00
XCore	Add XCore support for indirectbr / blockaddress.	2009-11-18 23:20:42 +00:00