llvm-6502/test/CodeGen
Pete Cooper ce3900849a Fixed bug when custom lowering DEC64m on x86.
If the DEC node had more than one user, it was doing this lowering but
leaving the original DEC node around and so decrementing twice.

Fixes PR11964.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-13 00:10:03 +00:00
..
ARM RegAlloc superpass: includes phi elimination, coalescing, and scheduling. 2012-02-10 04:10:36 +00:00
CBackend
CellSPU This patch addresses the problem of poor code generation for the zext 2012-02-12 15:05:31 +00:00
CPP Testcase for commit 149833 (use of an uninitialized variable noticed 2012-02-05 19:27:57 +00:00
Generic Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm. 2012-02-02 11:44:58 +00:00
Hexagon VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 2012-02-01 22:13:57 +00:00
MBlaze
Mips Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MSP430
PowerPC AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit 2012-01-16 22:53:41 +00:00
PTX
SPARC
Thumb
Thumb2 After r147827 and r147902, it's now possible for unallocatable registers to be 2012-01-14 01:53:46 +00:00
X86 Fixed bug when custom lowering DEC64m on x86. 2012-02-13 00:10:03 +00:00
XCore